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參數(shù)資料
| 型號(hào)： | MM24128-BWMW6T |
| 廠商： | 意法半導(dǎo)體 |
| 元件分類： | EEPROM |
| 英文描述： | 256/128 Kbit Serial IC Bus EEPROM Without Chip Enable Lines |
| 中文描述： | 一百二十八分之二百五十六千位串行IC總線的EEPROM芯片使能線無 |
| 文件頁數(shù)： | 1/17頁 |
| 文件大?。?/td> | 135K |
| 代理商： | MM24128-BWMW6T |
1/17
June 2001
M24256
M24128
256/128 Kbit Serial I2C Bus EEPROM
Without Chip Enable Lines
I
Compatible with I
2
C Extended Addressing
I
Two Wire I
2
C Serial Interface
Supports 400 kHz Protocol
I
Single Supply Voltage:
– 4.5V to 5.5V for M24xxx
– 2.5V to 5.5V for M24xxx-W
I
Hardware Write Control
I
BYTE and PAGE WRITE (up to 64 Bytes)
I
RANDOM and SEQUENTIAL READ Modes
I
Self-Timed Programming Cycle
I
Automatic Address Incrementing
I
Enhanced ESD/Latch-Up Behavior
I
More than 100,000 Erase/Write Cycles
I
More than 40 Year Data Retention
DESCRIPTION
These I
2
C-compatible electrically erasable pro-
grammable memory (EEPROM) devices are orga-
nized as 32Kx8 bits (M24256) and 16Kx8 bits
(M24128), and operate down to 2.5 V (for the -W
version of each device).
The M24256B, M24128B and M24256A are also
available, and offer the extra functionality of the
chip enable inputs. Please see the separate data
sheets for details of these products.
The M24256 and M24128 are available in Plastic
Dual-in-Line and Plastic Small Outline packages.
These memory devices are compatible with the
I
2
C extended memory standard. This is a two wire
Figure 1. Logic Diagram
AI01882
SDA
VCC
M24256
M24128
WC
SCL
VSS
Table 1. Signal Names
SDA
Serial Data/Address Input/
Output
SCL
Serial Clock
WC
Write Control
V
CC
Supply Voltage
V
SS
Ground
PDIP8 (BN)
0.25 mm frame
SO8 (MN)
150 mil width
8
1
8
1
SO8 (MW)
200 mil width
8
1
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