參數(shù)資料
型號(hào): ML674000
廠商: OKI ELECTRIC INDUSTRY CO LTD
元件分類: 微控制器/微處理器
英文描述: 32-BIT, MROM, 33 MHz, RISC MICROCONTROLLER, PQFP128
封裝: 14 X 14 MM, 0.40 MM PITCH, PLASTIC, TQFP-128
文件頁數(shù): 24/39頁
文件大?。?/td> 247K
代理商: ML674000
Rev.1.02
Jul 31, 2003
page 30 of 69
7560 Group (A version)
SERIAL I/O
Serial I/O1
Serial I/O1 can be used as either clock synchronous or asynchro-
nous (UART) serial I/O. A dedicated timer (baud rate generator) is
also provided for baud rate generation.
(1) Clock Synchronous Serial I/O Mode
Clock synchronous serial I/O mode is selected by setting the se-
rial I/O1 mode selection bit of the serial I/O1 control register to “1”.
For clock synchronous serial I/O mode, the transmitter and the re-
ceiver must use the same clock as an operation clock.
When an internal clock is selected as an operation clock, transmit
or receive is started by a write signal to the transmit buffer regis-
ter.
When an external clock is selected as an operation clock, serial I/
O1 becomes the state where transmit or receive can be performed
by a write signal to the transmit buffer register. Transmit and re-
ceive are started by input of an external clock.
Fig. 26 Block diagram of clock synchronous serial I/O1
Fig. 27 Operation of clock synchronous serial I/O1 function
P46/SCLK1
P47/SRDY1
P44/RXD
P45/TXD
XIN
1/4
F/F
Serial I/O1 status register
Serial I/O1 control register
Receive buffer register
Address 001816
Receive shift register
Receive buffer full flag (RBF)
Receive interrupt request
Receive clock control circuit
Shift clock
Serial I/O1 synchronous
clock selection bit
Frequency division ratio 1/(n+1)
Baud rate generator
Address 001C16
BRG count source selection bit
Falling-edge detector
Data bus
Address 001816
Shift clock
Transmit shift register shift completion flag (TSC)
Transmit buffer empty flag (TBE)
Transmit interrupt request
Transmit interrupt source selection bit
Address 001916
Data bus
Address 001A16
Transmit buffer register
Transmit shift register
Transmit clock control circuit
Receive enable signal SRDY1
D7
D0
D1
D2
D3
D4
D5
D6
RBF = “1”
TSC = “1”
TBE = “0”
TBE = “1”
TSC = “0”
Transmit and receive shift clock
(1/2 to 1/2048 of the internal
clock, or an external clock)
Serial output TXD
Serial input RXD
Write signal to receive/transmit
buffer register (address 001816)
Overrun error (OE)
detection
Notes 1 : After data transferring, the TxD pin keeps D7 output value.
2 : If data is written to the transmit buffer register when TSC = “0”, the transmit clock is generated continuously and serial data can
be output continuously from the TXD pin.
3 : Select the serial I/O1 transmit interrupt request factor between when the transmit buffer register has emptied (TBE = “1”) or
after the transmit shift operation has ended (TSC = “1”), by setting the transmit interrupt source selection bit (TIC) of the serial
I/O1 control register.
4 : The serial I/O1 receive interrupt request occurs when the receive buffer full flag (RBF) becomes “1”.
D7
D0
D1
D2
D3
D4
D5
D6
(Note 1)
(Note 3)
(Note 2)
(Note 3)
(Note 4)
相關(guān)PDF資料
PDF描述
ML674001TC 32-BIT, MROM, 33.333 MHz, RISC MICROCONTROLLER, PQFP144
ML67Q4002TC 32-BIT, FLASH, 33.333 MHz, RISC MICROCONTROLLER, PQFP144
ML67Q4002LA 32-BIT, FLASH, 33.333 MHz, RISC MICROCONTROLLER, PBGA144
ML674001LA 32-BIT, MROM, 33.333 MHz, RISC MICROCONTROLLER, PBGA144
ML67Q4051TC RISC MICROCONTROLLER, PQFP144
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ML674000-KIT 制造商:ROHM Semiconductor 功能描述:CMOS 32-Bit ARM-Based General-Purpose Single-Chip Microcontroller
ML674000LA 制造商:ROHM Semiconductor 功能描述:ML674000LAZ03A
ML674000LAZ03A-7 制造商:ROHM Semiconductor 功能描述:NEW PART NO ML674000LAZ0ARL 制造商:ROHM Semiconductor 功能描述:ML674000LAZ03A-7 - Bulk
ML674000LAZ0AL 制造商:ROHM Semiconductor 功能描述:ML674000LAZ0AL - Bulk
ML674000TBZ03A-7 制造商:ROHM Semiconductor 功能描述:Integrated Dual UART ARM7TDMI MCU 制造商:ROHM Semiconductor 功能描述:ARM7TDMI microprocessor integrated dual UART