
ML66517 Family User’s Manual
Chapter 18
Flash Memory
18 – 8
(3) Serial mode programming method
Programming in the serial mode is performed with the use of the flash memory writer PW66K or the flash
microcontroller programmer AF200.
The procedure for programming with the flash microcontroller programmer is listed below. Refer to the
PW66K and AF200 User’s Manuals for details of the flash microcontroller programmer.
1) Connect the flash microcontroller programmer to the P5_6, P5_7, CLKSEL0, VDD and GND pins of the
ML66Q517.
2) Set the microcontroller to the reset or STOP mode.
The flash microcontroller will generate a protocol error if other than reset or STOP modes are set.
3) Perform the programming or read operation with the flash microcontroller programmer.
The serial mode is set automatically.
4) Verify that operation of the flash microcontroller programmer has been completed correctly.
The serial mode is released automatically.
5) Release reset or the STOP mode.
The CPU runs the program that has been written.
(4) Setting of security function
The security function can be set or reset in the serial mode. For the setting method, refer to the User's
Manual for the flash microcontroller programmer.
When the security function is set, the flash memory outputs 0s, for external reading, throughout its entire
area and programming are disabled, in all programming modes.
(5) Notes on use of serial mode
If programming is performed during the STOP mode, while programming is in progress, do not generate an
interrupt or a reset via the
RES pin input. If generated, the CPU may run out of control after the serial mode
is released. During the STOP mode, execution of BRK instructions, overflow of the watchdog timer, and op
code traps will not generate reset. If an interrupt or reset is generated, reprogram the entire flash memory
area.
In the setting of Timer 0, TM0C will count up and an interrupt will be generated by overflow if the count
clock is set to TM0EVT and the TM0RUN bit is set to “1”.
Therefore, in the setting of Timer 0, the
TM0RUN bit should be reset to “0” or the count clock other than TM0EVT should be set so that TM0C will
not count up.