![](http://datasheet.mmic.net.cn/120000/ML60851EGA_datasheet_3559815/ML60851EGA_14.png)
Oki Semiconductor
ML60851E
12/84
Configuration state:
This bit is used as an indication of whether the device has entered the configuration state. The content of
this bit does not affect the operation of ML60851E and hence, it is not necessary to write to it.
If a SET_CONFIGURATION request is received from the host when the device is in the address state,
the local MCU should assert the configuration bits of EP1CON, EP2CON, or EP3CON. At this time, it
may be useful to write a “1” to this bit to indicate that the device has entered the configuration state.
Remarks:
When all these three states are “1”, it means that this IC is operating normally. However, since Default
state bit, Address state bit and Configuration state bit do not affect the operation of the ML60851E,
there is no need to write in these bits if they will not be read out.
Suspend state:
When the idle condition continues for more than 3ms in the USB bus, the ML60851E automatically
asserts this bit thereby indicating that it is going into the suspend state. At the same time, bit D6 of the
interrupt status register INTSTAT is asserted and the
INTR pin is asserted. With this, the local MCU
can suppress the current consumption.
This bit is deasserted when the EOP of any type of packet is received.
Remote wake-up:
The ML60851E is in the suspend state, the remote wake-up function is activated when the local MCU
asserts this bit. When this bit is written while 5ms have not yet elapsed in the idle condition, the remote
wake-up signal is output after waiting for the idle condition to continue for the full 5ms period. Further,
when this bit is written after the idle condition has persisted for 5ms or more, the remote wake-up signal
is output immediately after this bit is written. This bit is deasserted automatically when the suspend
state is released by receiving the resume instruction over the USB bus.
USB bus reset status clear:
When the ML60851E is in the USB bus reset interrupt state (bit D5 of the interrupt status register, that is
the USB bus reset interrupt status bit is “1” and the
INTR pin is asserted), it is possible to clear the
interrupt status by writing a “1” in this bit. (This makes the USB bus reset interrupt status bit “0” and
deassertes
INTR.) Although this bit can be read out, the read out value will always be “0”.