參數(shù)資料
型號(hào): MK30X256VMD100R
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA144
封裝: 13 X 13 MM, MAPBGA-144
文件頁數(shù): 52/72頁
文件大?。?/td> 1847K
代理商: MK30X256VMD100R
First data
Last data
First data
Data
Last data
Data
DS15
DS10
DS9
DS16
DS11
DS12
DS14
DS13
DSPI_SS
DSPI_SCK
(CPOL=0)
DSPI_SOUT
DSPI_SIN
Figure 25. DSPI classic SPI timing — slave mode
6.8.4 I2C switching specifications
6.8.5 UART switching specifications
6.8.6 SDHC specifications
The following timing specs are defined at the chip I/O pin and must be translated
appropriately to arrive at timing specs/constraints for the physical interface.
Table 39. SDHC switching specifications
Num
Symbol
Description
Min.
Max.
Unit
Operating voltage
2.7
3.6
V
Card input clock
SD1
fpp
Clock frequency (low speed)
0
400
kHz
fpp
Clock frequency (SD\SDIO full speed)
0
25
MHz
fpp
Clock frequency (MMC full speed)
0
20
MHz
fOD
Clock frequency (identification mode)
0
400
kHz
SD2
tWL
Clock low time
7
ns
SD3
tWH
Clock high time
7
ns
SD4
tTLH
Clock rise time
3
ns
Table continues on the next page...
Peripheral operating requirements and behaviors
K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
56
Preliminary
Freescale Semiconductor, Inc.
相關(guān)PDF資料
PDF描述
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