參數(shù)資料
型號(hào): MDS213
廠商: Zarlink Semiconductor Inc.
英文描述: 12-Port 10/100Mbps + 1Gbps Ethernet Switch
中文描述: 12口10/100Mbps千兆以太網(wǎng)交換機(jī)
文件頁數(shù): 87/120頁
文件大小: 1678K
代理商: MDS213
MDS213
Data Sheet
87
Zarlink Semiconductor Inc.
Bit [22:18]
REG_AD
5-bit Register Address in PHY
Bit [17:16]
TA
Turnaround - "10" for write
Bit [15:0]
DATA
16-bit Write Data to PHY
18.2.9.2 AMIIS - MII Status Register
The upper layer services should read this register for data sent by the PHYs. The lower 16 bits contain data
received by the Management Module
Access:
Non-Zero-Wait-State,
Direct Access,
Read only
Address:
h658
Bit [31]
RDY
Data Ready
Bit [30]
VALID
Data Valid
Bit [15:0]
DATA
16-bit Read Data from PHY
18.2.10 Flow Control Management
18.2.10.1 AFCRIA - Flow Control RAM Input Address
Access:
Non-Zero-Wait-State,
Direct Access,
Write only
Address:
h65C
Bit [2:0]
3-bit address for the RAM in MAC storing flow control frame
Usage:
Flow Control Frame consists of 64 Bytes. Using AFCRIA and AFCRID0-1, the CPU loads 8 bytes each
time. The CPU specifies the address in AFCRIA and writes the content of 4 bytes in AFCRID0 and 4 Bytes in
AFCRID1. Then repeats the above procedure 8 times to load a whole flow control frame into the Chip.
Bit [31]
RDY
Bit [30]
VALID
Description
1
1
Data field contains valid data from the PHYs
1
0
Data field contains invalid data from the PHYs
0
X
Data field is not ready to be read by Switch Manager CPU
2 1 0
DATA (16-bit)
RY
VD
31 30 29
16 15
0
address
31
3 2
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