參數(shù)資料
型號: MDS213
廠商: Zarlink Semiconductor Inc.
英文描述: 12-Port 10/100Mbps + 1Gbps Ethernet Switch
中文描述: 12口10/100Mbps千兆以太網(wǎng)交換機
文件頁數(shù): 71/120頁
文件大?。?/td> 1678K
代理商: MDS213
MDS213
Data Sheet
71
Zarlink Semiconductor Inc.
Frame Engine and MAC Configuration
Boot Strap
Determine by the bootstrap value.
Bit [18]
Reserved
Bit [19]
FE_AGEN
Aging enable. If true, the memory
resources, occupied by the old
message, will free up.
0 = disable aging
Default = 1
1 = enable aging
Bit [20]
FOF
Forward Oversize Frames
0 = Discard oversize frames
Power-up default =0
1 = Forward oversize
frames
Bit [21]
Dec_Buffer_CNT
Decrements buffer counter. When the software writes "1" to this
bit, the Frame Engine decreases buffer counter by one.
Bit [22]
BC_EN
Buffer counter enable
0 = Disable (no head of line
control
1 = enable
Bit [23]
STA_EN
Status counter enable
0 = collect status in counter
disable
1 = collect status in
counter enable
Bit [24]
SEL_PCS
0 = Use external PCS
Default=0
1 = Use internal PCS in
the chip
Bit [25]
Link_GT
TX LED will be off when the link is
down and this bit is 0
0 = Gate 0ff TX_En when Link
down
Default =0
1 = Not Gate off TX_En
when Link down
Bit [26]
IPMC
IP Multicast privileges enable: IP
multicast traffic has a privilege over
regular multicast traffic.
0= disable
Default=0
1= enable
Bit [27]
BMOD
Control Bus Mode
(Read only bit) Must BE 0
Bit [28]
RW
CPU Read/Write Control Polarity Selection
Read only bit
0 = R/W#
1 = W/R#
Bit [29]
SWM
Switching Mode
(Read only bit)
0 = Managed mode
Default=1
1 = Unmanaged mode
Bit [30]
PSD
Master Device Enable (Read only bit)
1 =Primary
Default=1
0 = Secondary
Bit [31]
MRDY
Option of merge the RDY and B_RDY as
one pin
(Read only bit)
0 =merged pin
Default=1
1 = separated pins
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