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| 型號(hào)： | MCM16Y1BGCFT16 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, MICROCONTROLLER, PQFP160 |
| 封裝： | QFP-160 |
| 文件頁(yè)數(shù)： | 11/138頁(yè) |
| 文件大?。?/td> | 784K |
| 代理商： | MCM16Y1BGCFT16 |
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MOTOROLA
MC68HC16Y1
108
MC68HC16Y1TS/D
Each SCCR0 contains the baud rate selection field. Baud rate must be set before the SCI is enabled.
The CPU can read and write this register at any time.
Bits [15:13] — Not Implemented
SCBR — Baud Rate
SCI baud rate is programmed by writing a 13-bit value to this field. Writing a value of zero to BR disables
the baud rate generator.
The SCI receiver operates asynchronously. An internal clock is necessary to synchronize with an in-
coming data stream. The SCI baud rate generator produces a receiver sampling clock with a frequency
16 times that of the expected baud rate of the incoming data. The SCI determines the position of bit
boundaries from transitions within the received waveform, and adjusts sampling points to the proper po-
sitions within the bit period. Receiver sampling rate is always 16 times the frequency of the SCI baud
rate, which is calculated as follows:
SCI Baud Rate = System Clock/(32
BR)
where BR is in the range {1, 2, 3, ..., 8191}.
Each SCCR1 contains SCI configuration parameters. The CPU can read and write this register at any
time. The SCI can modify RWU in some circumstances. In general, interrupts enabled by these control
bits are cleared by reading SCSR, then reading (receiver status bits) or writing (transmitter status bits)
SCDR.
SCCR1A/B15 — Not Implemented
LOOPS — Loop Mode
0 = Normal SCI operation, no looping, feedback path disabled
1 = Test SCI operation, looping, feedback path enabled
LOOPS controls a feedback path on the data serial shifter. When loop mode is enabled, SCI transmitter
output is fed back into the receive serial shifter. TXD is asserted (idle line). Both transmitter and receiver
must be enabled prior to entering loop mode.
WOMS — Wired-OR Mode for SCI Pins
0 = If configured as an output, TXD is a normal CMOS output.
1 = If configured as an output, TXD is an open-drain output.
WOMS determines whether the TXD pin is an open-drain output or a normal CMOS output. This bit is
used only when TXD is an output. If TXD is used as a general-purpose input pin, WOMS has no effect.
ILT — Idle-Line Detect Type
0 = Short idle-line detect (start count on first one)
1 = Long idle-line detect (start count on first one after stop bit(s))
SCCR0A, SCCR0B — SCI Control Register 0
$YFFC18, $YFFC28
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SCBR
RESET:
0
1
0
SCCR1A, SCCR1B — SCI Control Register 1
$YFFC1A, $YFFC2A
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
LOOPS WOMS
ILT
PT
PE
M
WAKE
TIE
TCIE
RIE
ILIE
TE
RE
RWU
SBK
RESET:
0
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