- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄69032 > MCM16Y1BACFT16 (MOTOROLA INC) 16-BIT, MROM, MICROCONTROLLER, PQFP160 PDF資料下載
參數(shù)資料
| 型號(hào)： | MCM16Y1BACFT16 |
| 廠商： | MOTOROLA INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, MICROCONTROLLER, PQFP160 |
| 封裝： | QFP-160 |
| 文件頁(yè)數(shù)： | 21/138頁(yè) |
| 文件大小： | 784K |
| 代理商： | MCM16Y1BACFT16 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)當(dāng)前第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)
MC68HC16Y1
MOTOROLA
MC68HC16Y1TS/D
117
The MRM can also operate in a special emulator mode that simplifies emulation of the array by an ex-
ternal device. Emulation mode is enabled by the EMUL bit in the MRMCR. EMUL state is determined
by the state of the DATA10 and DATA13 lines during reset. If both data lines are held low, EMUL is set,
and ROM emulation mode is enabled.
While emulation mode is enabled, the internal module chip select signal (CSM) is asserted whenever a
valid access to an address assigned to the masked ROM module is made. To be valid, an access must
be within the range specified by the ROM base array registers and must meet the address space re-
quirements defined by the ASPC field in MRMCR. CSM is asserted for all valid read accesses; it is as-
serted for write accesses only in background debug mode. The MRM does not acknowledge an access
on the IMB while in emulation mode — this causes the SCIM to run an external bus cycle. The CSM
signal is asserted on the falling edge of AS. Internal DSACK is generated by the ROM module after it
has inserted the number of wait states specified by the WAIT field in the MRMCR.
9.1 Masked ROM Control Registers
The 32-byte control register block contains registers that are used to configure the MRM and to control
ROM array function. Configuration information is specified and programmed at the same time as the
ROM content.
*Reset state of STOP = DATA14. Reset state of EMUL = (DATA10
DATA13).
STOP — Stop Bit
0 = Normal ROM operation
1 = Disable ROM and activate emulator mode if enabled
Reset state of STOP is the complement of DATA14 state during reset. ROM array base address cannot
be changed unless STOP is set.
BOOT — Boot ROM Control Bit
0 = CPU16 accesses ROM array addresses after reset
1 = CPU16 cannot access ROM array addresses after reset
Reset state of BOOT is specified by the user. Bootstrap function is overridden if STOP = 1.
LOCK — Lock Registers Bit
0 = Write lock disabled; protected registers and fields can be written
1 = Write lock enabled; protected registers and fields cannot be written
Reset state of LOCK is specified by the user. LOCK protects the ASPC and WAIT fields, as well as the
ROMBAL and ROMBAH registers. ASPC, ROMBAL and ROMBAH are also protected by the STOP bit.
EMUL — Emulator Mode Control Bit
0 = Normal ROM operation
1 = MRM enters emulator mode when STOP is set.
Reset state of EMUL is the complement of DATA10 and DATA13 state during reset. When EMUL is set,
the MRM responds to accesses by asserting the CSM signal.
MRMCR — Masked ROM Module Configuration Register
$YFF820
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
STOP
0
BOOT
LOCK
EMUL
ASPC
WAIT
0
RESET:
*
0
USER
SPEC
USER
SPEC
*
USER
SPEC
USER
SPEC
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCM16Y1BGCFT16 | 16-BIT, MROM, MICROCONTROLLER, PQFP160 |
| M68HC16Y1CFC | 16-BIT, MROM, MICROCONTROLLER, PQFP16 |
| MCV14AI/SL | 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO14 |
| MCV14ATI/SL | 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDSO14 |
| MCV14AI/P | 8-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PDIP14 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCM16Z2BCFC16 | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC16B1 | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC20 | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:Symbols and Operators, CPU16 Register Mnemonics |
| MCM16Z2BCFC20B1 | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:M68HC16Z Series users manual |
| MCM16Z2BCFC25 | 制造商:FREESCALE 制造商全稱(chēng):Freescale Semiconductor, Inc 功能描述:M68HC16Z Series users manual |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。