Functional Description and Application Information
i.MX31/i.MX31L Advance Information, Rev. 1.4
Freescale Semiconductor
5
Preliminary
2.2
Module Inventory
Table 3
shows an alphabetical listing of the modules in the multimedia applications processor. A
cross-reference is provided directly to each module description for more information.
Table 2. i.MX31/i.MX31L Core
Core
Acronym
Core
Name
Brief Description
Integrated Memory
Includes
ARM11 or
ARM1136
ARM1136
Platform
The ARM1136 Platform consists of the ARM1136JF-S core, the ETM
real-time debug modules, a 6 x 5 multi-layer AHB crossbar switch (MAX), and a
Vector Floating Processor (VFP).
The i.MX31/i.MX31L provide a high-performance ARM11 microprocessor core
and highly integrated system functions. The ARM Application Processor (AP)
and other subsystems address the needs of the personal, wireless, and portable
product market with integrated peripherals, advanced processor core, and
power management capabilities.
16 Kbyte
Instruction Cache
16 Kbyte Data
Cache
128 Kbyte L2
Cache
32 Kbyte ROM
16 Kbyte RAM
Table 3. Digital and Analog Modules
Block
Mnemonic
Block Name
Functional
Grouping
Brief Description3
Section/
Page
1-Wire
1-Wire Interface
Connectivity
Peripheral
The 1-Wire module provides bi-directional communication between
the ARM11 core and the Add-Only-Memory EPROM (DS2502).
The 1-Kbit EPROM is used to hold information about battery and
communicates with the ARM11 platform using the IP interface.
2.3.1/8
ATA
Advanced
Technology (AT)
Attachment
Connectivity
Peripheral
The ATA block is an AT attachment host interface. It is designed to
interface with IDE hard disc drives and ATAPI optical disc drives.
2.3.2/8
AUDMUX
Digital Audio
Multiplexer
Multimedia
Peripheral
The AUDMUX interconnections allow multiple, simultaneous
audio/voice/data flows between the ports in point-to-point or
point-to-multipoint configurations.
2.3.3/9
CCM
Clock Control
Module
Clock
The CCM provides clock, reset, and power management control for
the i.MX31 and i.MX31L.
2.3.4/9
CSPI
Configurable
Serial Peripheral
Interface (x 3)
Connectivity
Peripheral
The CSPI is equipped with data FIFOs and is a master/slave
configurable serial peripheral interface module, capable of
interfacing to both SPI master and slave devices.
2.3.5/10
ECT
Embedded
Cross Trigger
Debug
The ECT is composed of three CTIs (Cross Trigger Interface) and
one CTM (Cross Trigger Matrix—key in the multi-core and multi-IP
debug strategy.
2.3.6/10
EMI
External
Memory
Interface
Memory
Interface (EMI)
The EMI includes
Multi-Master Memory Interface (M3IF)
Enhanced SDRAM/MDDR memory controller (SDRAMC)
NAND Flash Controller (NFC)
Wireless External Interface Module (WEIM)
2.3.7/11
EPIT
Enhanced
Periodic
Interrupt Timer
Timer
Peripheral
The EPIT is a 32-bit “set and forget” timer which starts counting
after the EPIT is enabled by software. It is capable of providing
precise interrupts at regular intervals with minimal processor
intervention.
2.3.8/12