MCF532x ColdFire Microprocessor Data Sheet, Rev. 5 Fr" />
參數(shù)資料
型號(hào): MCF5329CVM240
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 9/50頁(yè)
文件大小: 0K
描述: IC MCU 32BIT 240MHZ 256-MAPBGA
標(biāo)準(zhǔn)包裝: 90
系列: MCF532x
核心處理器: Coldfire V3
芯體尺寸: 32-位
速度: 240MHz
連通性: CAN,EBI/EMI,以太網(wǎng),I²C,SPI,SSI,UART/USART,USB,USB OTG
外圍設(shè)備: DMA,LCD,PWM,WDT
輸入/輸出數(shù): 94
程序存儲(chǔ)器類型: ROMless
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.4 V ~ 3.6 V
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 256-LBGA
包裝: 托盤
Electrical Characteristics
MCF532x ColdFire Microprocessor Data Sheet, Rev. 5
Freescale Semiconductor
17
5.2
Thermal Characteristics
The average chip-junction temperature (TJ) in °C can be obtained from:
Eqn. 1
Where:
TA
= Ambient Temperature,
°C
QJMA
= Package Thermal Resistance, Junction-to-Ambient,
°C/W
PD
=PINT + PI/O
PINT
=IDD × IVDD, Watts - Chip Internal Power
PI/O
= Power Dissipation on Input and Output Pins — User Determined
For most applications PI/O < PINT and can be ignored. An approximate relationship between PD and TJ (if PI/O is neglected) is:
Eqn. 2
Solving equations 1 and 2 for K gives:
Eqn. 3
Table 5. Thermal Characteristics
Characteristic
Symbol
256MBGA
196MBGA
Unit
Junction to ambient, natural convection
Four layer board
(2s2p)
θ
JMA
371,2
1
θ
JMA and Ψjt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection.
Freescale recommends the use of
θ
JmA and power dissipation specifications in the system design to prevent
device junction temperatures from exceeding the rated specification. System designers should be aware that
device junction temperatures can be significantly influenced by board layout and surrounding devices.
Conformance to the device junction temperature specification can be verified by physical measurement in the
customer’s system using the
Ψ
jt parameter, the device power dissipation, and the method described in
EIA/JESD Standard 51-2.
2 Per JEDEC JESD51-6 with the board horizontal.
°C/W
Junction to ambient (@200 ft/min)
Four layer board
(2s2p)
θ
JMA
341,2
°C/W
Junction to board
θ
JB
273
3 Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8.
Board temperature is measured on the top surface of the board near the package.
323
°C/W
Junction to case
θ
JC
164
4 Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL
SPEC-883 Method 1012.1).
194
°C/W
Junction to top of package
Ψ
jt
41,5
5 Thermal characterization parameter indicating the temperature difference between package top and the
junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal
characterization parameter is written in conformance with Psi-JT.
°C/W
Maximum operating junction temperature
Tj
105
oC
T
J
T
A
P
D
Θ
JMA
×
()
+
=
P
D
K
T
J
273
°C
+
()
---------------------------------
=
KP
D
T
A
273
°C
×
() Q
JMA
P
D
2
×
+
×
=
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