Pin Assignments and Reset States
MCF532x ColdFire Microprocessor Data Sheet, Rev. 5
Freescale Semiconductor
11
QSPI
QSPI_CS2
PQSPI5
U2RTS
—
O
EVDD
P10
T12
QSPI_CS1
PQSPI4
PWM7
USBOTG_
PU_EN
O
EVDD
L11
T13
QSPI_CS0
PQSPI3
PWM5
—
O
EVDD
—
P11
QSPI_CLK
PQSPI2
I2C_SCL2
—
O
EVDD
N10
R12
QSPI_DIN
PQSPI1
U2CTS
—
I
EVDD
L10
N12
QSPI_DOUT
PQSPI0
I2C_SDA
—
O
EVDD
M10
P12
UARTs
U1CTS
PUARTL7
SSI_BCLK
—
I
EVDD
C9
D11
U1RTS
PUARTL6
SSI_FS
—
O
EVDD
D9
E10
U1TXD
PUARTL5
SSI_TXD2
—
O
EVDD
A9
E11
U1RXD
PUARTL4
SSI_RXD2
—
I
EVDD
A10
E12
U0CTS
PUARTL3
—
I
EVDD
P13
R15
U0RTS
PUARTL2
—
O
EVDD
N12
T15
U0TXD
PUARTL1
—
O
EVDD
P12
T14
U0RXD
PUARTL0
—
I
EVDD
P11
R14
Note: The UART2 signals are multiplexed on the QSPI, SSI, DMA Timers, and I2C pins.
DMA Timers
DT3IN
PTIMER3
DT3OUT
U2RXD
I
EVDD
C1
F1
DT2IN
PTIMER2
DT2OUT
U2TXD
I
EVDD
B1
E1
DT1IN
PTIMER1
DT1OUT
DACK1
I
EVDD
A1
E2
DT0IN
PTIMER0
DT0OUT
DREQ02
I
EVDD
C2
E3
BDM/JTAG6
JTAG_EN7
—
I
EVDD
L12
M13
DSCLK
—
TRST2
—
I
EVDD
N14
P15
PSTCLK
—
TCLK2
—
O
EVDD
L7
T9
BKPT
—
TMS2
—
I
EVDD
M12
R16
DSI
—
TDI2
—
I
EVDD
K12
N14
DSO
—
TDO
—
O
EVDD
N9
N11
DDATA[3:0]
—
O
EVDD
N7, P7, L8,
M8
N9, P9, N10,
P10
N9, P9, N10,
P10
Table 3. MCF5327/8/9 Signal Information and Muxing (continued)
Signal Name
GPIO
Alternate 1
Alternate 2
Di
r.
1
Vo
lt
a
g
e
Domain
MCF5327
196
MAPBGA
MCF5328
256
MAPBGA
MCF53281
MCF5329
256
MAPBGA