General Purpose I/O Module
MCF5272 ColdFire Integrated Microprocessor User’s Manual, Rev. 3
17-8
Freescale Semiconductor
17.2.3
Port C Control Register
There is no port C control register. Port C is enabled only when the external data bus is 16 bits wide. This
is done by holding QSPI_DOUT/WSEL high during reset. When QSPI_DOUT/WSEL is low during reset,
the external data bus is 32 bits wide and port C is unavailable.
17.2.4
Port D Control Register (PDCNT)
PDCNT, shown in
Table 17-8, is used to configure pins that have multiple functions but no associated
GPIO capability. Port D has no data register nor data direction register.
31
16
Field
—
Reset
—
R/W
—
15
14
13
12
11
10
9
876543210
Field
PDCNT7
PDCNT6
PDCNT5
PDCNT4
PDCNT3
PDCNT2
PDCNT1
PDCNT0
Reset
0000_0000_0000_0000
R/W
Read/Write
Addr
MBAR + 0x0098
Figure 17-3. Port D Control Register (PDCNT)
Table 17-7. PDCNT Field Descriptions
Bits
Name
Description
31–16
—
Reserved
15–14
PDCNT7
Configure pin K6.
00 High impedance
01 PWM_OUT2
10 TIN1
11 Reserved
13–12
PDCNT6
Configure pin P5.
00 High impedance
01 PWM_OUT1
10 TOUT1
11 Reserved
11–10
PDCNT5
Configure pin P2.
00 High impedance
01 Reserved
10 DIN3
11 INT4
9–8
PDCNT4
Configure pin K1.
00 High impedance
01 DOUT0
10 URT1_TxD
11 Reserved