參數(shù)資料
型號(hào)： MC68HSC05C9A
廠商： Motorola, Inc.
元件分類： 8位微控制器
英文描述： 8-Bit Microcontroller(8位微控制器)
中文描述： 8位微控制器（8位微控制器）
文件頁數(shù)： 66/160頁
文件大?。?/td> 783K
代理商： MC68HSC05C9A
L
G
R
Capture/Compare Timer
General Release Specification
MC68HC05C9A
—
Rev. 4.0
66
Capture/Compare Timer
MOTOROLA
8.4.6 Output Compare Registers (OCRH and OCRL)
When the value of the 16-bit counter matches the value in the output
compare registers, the planned TCMP pin action takes place. Writing to
OCRH before writing to OCRL inhibits timer compares until OCRL is
written. Reading or writing to OCRL after the timer status register clears
the output compare flag (OCF).
Figure 8-7. Output Compare Registers (OCRH and OCRL)
To prevent OCF from being set between the time it is read and the time
the output compare registers are updated, use this procedure:
1.
Disable interrupts by setting the I bit in the condition code register.
2.
Write to OCRH. Compares are now inhibited until OCRL is written.
3.
Clear bit OCF by reading timer status register (TSR).
4.
Enable the output compare function by writing to OCRL.
5.
Enable interrupts by clearing the I bit in the condition code
register.
OCRH
$0016
Bit 7
6
5
4
3
2
1
Bit 0
Write:
BIT15
BIT14
BIT13
BIT12
BIT11
BIT10
BIT9
BIT8
Read:
Unaffected by Reset
OCRL
$0017
Bit 7
6
5
4
3
2
1
Bit 0
Write:
BIT7
BIT6
BIT5
BIT4
BIT3
BIT2
BIT1
BIT0
Read:
Unaffected by Reset
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