參數(shù)資料
型號： MC68HC705V8CFN
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 55/172頁
文件大?。?/td> 890K
代理商： MC68HC705V8CFN
SECTION 16: INSTRUCTION SET
MOTOROLA
Page 137
MC68HC705V8 Specification Rev. 2.1
SECTION 16
INSTRUCTION SET
The MCU has a set of 62 basic instructions. They can be divided into five different types:
register/memory, read-modify-write, branch, bit manipulation, and control. The following
paragraphs briefly explain each type. For more information on the instruction set, refer to
the
M6805 Family User’s Manual (M6805UM/AD2) or the associated MC68HC05 Data
Sheet.
16.1
REGISTER/MEMORY INSTRUCTIONS
Most of these instructions use two operands. One operand is either the accumulator or the
index register. The other operand is obtained from memory using one of the addressing
modes. The jump unconditional (JMP) and jump to subroutine (JSR) instructions have no
register operand. Refer to the following instruction list.
16.2
READ-MODIFY-WRITE INSTRUCTIONS
These instructions read a memory location or a register, modify or test its contents, and
write the modified value back to memory or to the register. The test for negative or zero
(TST) instruction is an exception to the read-modify-write sequence since it does not modify
the value. Do not use these read-modify-write instructions on write-only locations. Refer to
the following list of instructions.
Function
Load A from Memory
Load X from Memory
Store A in Memory
Store X in Memory
Add Memory to A
Add Memory and Carry to A
Subtract Memory
Subtract Memory from A with Borrow
AND Memory to A
OR Memory with A
Exclusive OR Memory with A
Arithmetic Compare A with Memory
Arithmetic Compare X with Memory
Bit Test Memory with A (Logical Compare)
Jump Unconditional
Jump to Subroutine
Mnemonic
LDA
LDX
STA
STX
ADD
ADC
SUB
SBC
AND
ORA
EOR
CMP
CPX
BIT
JMP
JSR
Multiply
MUL
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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