參數(shù)資料
型號： MC68HC705V8CFN
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PQCC68
封裝： PLASTIC, LCC-68
文件頁數(shù)： 103/172頁
文件大小： 890K
代理商： MC68HC705V8CFN
SECTION 3: EPROM AND EEPROM
MOTOROLA
Page 25
MC68HC705V8 Specification Rev. 2.1
1- The MOR register contents are placed into the memory map at location
$3C00.
The contents of the MOR register can be read/written only if this bit is set and is available
in any operating mode. This bit must be set when the MOR byte is being programmed.
LATCH - EPROM Latch Control
This bit latches the address and data bus when a write to the EPROM array is performed.
NOTE:
The EPROM array cannot be read while this bit is set.
0 - EPROM address and data bus configured for normal reads.
1 - EPROM address and data bus configured for programming.
EPGM - EPROM Program Control
READ: Any time
WRITE: Cleared any time, Set only if LATCH=1
This bit controls the programming voltage to the EPROM array. EPGM can not be set if
LATCH is not already set. EPGM is automatically cleared when LATCH = 0.
NOTE:
LATCH and EPGM cannot both be set on the same write.
0 - Programming power switched off to the EPROM array.
1 - Programming power switched on to the EPROM array.
The sequence for programming the EPROM is as follows:
1. Set the LATCH bit. If programming the MOR byte, also set the MORON bit.
2. Write the data to be programmed to the EPROM (or MOR byte) location to be
programmed.
3. Set the EPGM bit.
4. Wait a time tEPGM
5. Clear the LATCH, MORON (if programming the MOR byte) and EPGM bits.
6. Repeat for each byte.
3.3
MASK OPTION REGISTER (MOR) $3C00
The Mask Option Register (MOR) is used to select all mask options available on the
MC68HC705V8.
When in the erased state, the EPROM cells will read as a logic zero
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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