
Programmable Timer
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
106
Freescale Semiconductor
Figure 11-1. Programmable Timer Overall Block Diagram
IEDG
OL
VL
ICI
E
OCIE
TO
IE
TMRH ($0018)
TMRL ($0019)
16-BIT COUNTER
÷ 4
INTERNAL
(OSC
÷ 2)
TIMER CONTROL REGISTER
TIMER
REQUEST
O
V
ERFLO
W
(T
OF)
RESET
CLOCK
INTERRUPT
ACRH ($001A)
ACRL ($001B)
16-BIT COMPARATOR
OCRH ($0016)
OCRL ($0017)
PIN I/O
LOGIC
PB4
AN4
TCMP
PB3
AN3
TCAP
EDGE
SELECT
& DETECT
ICF
OCF
TO
F
TIMER STATUS REGISTER
IE
DG
IC
F
OCF
OL
VL
$0012
$0013
INTERNAL DATA BUS
LOGIC
INPUT
SELECT
MUX
CPF2
FLAG
ICEN
CONTROL
BIT
FROM
ANALOG
SUBSYSTEM
ICRH ($0014)
ICRL ($0015)
D
C
Q
ANALOG
COMP 1