參數(shù)資料
型號(hào)： MC68HC705JB2P
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP20
封裝： PLASTIC, DIP-20
文件頁數(shù)： 27/128頁
文件大?。?/td> 2493K
代理商： MC68HC705JB2P
GENERAL RELEASE SPECIFICATION
August 28, 1998
ELECTRICAL SPECIFICATIONS
MC68HC705JB2
13-4
REV 1.1
13.5
USB LOW SPEED SOURCE ELECTRICAL CHARACTERISTICS
NOTES:
1. All voltages measured from local ground, unless otherwise specified.
2. All timings use a capacitive load of 50pF, unless otherwise specified.
3. Low speed timings have a 1.5k pull-up to 2.8V on the D- data line.
4. Measured from 10% to 90% of the data signal.
5. The rising and falling edges should be smooth transitional (monotonic).
6. Timing differences between the differential data signals.
7. Measured at crossover point of differential data signals.
8. Capacitive loading includes 50pF of tester capacitance.
Table 13-5. USB Low Speed Source Electrical Characteristics
Parameter
Symbol
Conditions
(Notes 1,2,3)
Min
Typ
Max
Unit
Transition time:
Rise Time
Fall Time
TR
TF
Notes 4, 5, 8
CL=50pF
CL=350pF
CL=50pF
CL=350pF
75
300
ns
Rise/Fall Time Matching
TRFM
TR/TF
80
120
%
Output Signal Crossover
Voltage
VCRS
1.3
2.0
V
Low Speed Data Rate
TDRATE
1.5Mbs
±1.5%
1.4775
676.8
1.500
666.0
1.5225
656.8
Mbs
ns
Source Differential Driver Jitter
To Next Transition
For Paired Transitions
TUDJ1
TUDJ2
CL=350pF
Notes 6,7 and
Figure 12-2
–25
–10
25
10
ns
Receiver Data Jitter Tolerance
To Next Transition
For Paired Transitions
TDJR1
TDJR2
CL=350pF
Notes 7 and
Figure 12-4
–75
–45
75
45
ns
Source EOP Width
TEOPT
Note 7 and
Figure 12-3
1.25
1.50
s
Differential to EOP Transition
Skew
TDEOP
Note 7 and
Figure 12-3
–40
100
ns
Receiver EOP Width
Must Reject as EOP
Must Accept
TEOPR1
TEOPR2
Note 7 and
Figure 12-3
330
675
ns
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)PDF資料
PDF描述
MC68HC705JB4P 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP28
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