參數資料
型號: MC68HC705JB2P
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 3 MHz, MICROCONTROLLER, PDIP20
封裝: PLASTIC, DIP-20
文件頁數: 100/128頁
文件大?。?/td> 2493K
代理商: MC68HC705JB2P
August 28, 1998
GENERAL RELEASE SPECIFICATION
UNIVERSAL SERIAL BUS MODULE
REV 1.1
10-5
Figure 10-5. SOP, Sync Signaling and Voltage Levels
10.2.1.2 Packet Identier Field
The Packet Identier eld is an eight bit number comprised of the four bit packet
identication (PID) and its complement. The eld follows the sync pattern and
determines the direction and type of transaction on the bus. Table 10-1 shows the
PID values for the supported packet types.
Table 10-1. Supported Packet Identiers
10.2.1.3 Address Field (ADDR)
The Address eld is a seven bit number that is used to select a particular USB
device. This eld is compared to the lower seven bits of the UADDR register to
determine if a given transaction is targeting the MC68HC705JB2 USB device.
PID Value
PID Type
%1001
IN Token
%0001
OUT Token
%1101
SETUP Token
%0011
DATA0 Packet
%1011
DATA1 Packet
%0010
ACK Handshake
%1010
NAK Handshake
%1110
STALL Handshake
END OF SYNC
FIRST BIT OF PACKET
SOP
BUS IDLE
VOH (min)
VSE (max)
VSE (min)
VOL (min)
VSS
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For More Information On This Product,
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相關代理商/技術參數
參數描述
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