參數(shù)資料
型號(hào)： MC68HC705CL4FU
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 1.84 MHz, MICROCONTROLLER, PQFP80
封裝： QFP-80
文件頁(yè)數(shù)： 65/101頁(yè)
文件大?。?/td> 517K
代理商： MC68HC705CL4FU
GENERAL RELEASE SPECIFICATION
February 12, 1997
MOTOROLA
CALLER ID
MC68HC05CL4
10-2
REV 2.0
10.1.1 FSK Demodulator
The demodulator recovers the FSK data transmitted over the telephone line. It rst
band limits the incoming signal with a bandpass lter whose output is fed to the
carrier detect threshold comparator as well as to the differential detector for
demodulation. The recovered signal consists of both the channel seizure informa-
tion and the message words. The original serial raw data is made available via the
MCU registers. See Section 10.2.2.
10.1.2 Carrier Detector
The Carrier Detect block will validate the carrier signal from the Filter section. The
asynchronous carrier signal is considered valid if present for a minimum of 25ms.
A carrier dropout is conrmed if it is silent for more than 8ms. The carrier detect
signal will remain low until a dropout condition is detected. The carrier detect out-
put is available in a read-only register (CD) in Control/Status Register 2
(CLCSR2). It can also be overwritten by writing to CDO (Carrier Detect Override)
in the Control/Status Register(CLCSR1) when enabled by writing a “1” to CDOE
(Carrier Detect Override Enable) in the CLCSR3 register. A valid carrier can also
produce an interrupt to the CPU when enabled by the CDIE bit in CLCSR1. See
10.1.3 Ring Detector
The ring detect circuit validates the input ring signal (RD2) and the ring detect out-
put is available in a read-only register (RD) in Control/Status Register 2
(CLCSR2). It can also be overwritten by writing to RDO (Ring Detect Override) in
the Control/Status Register (CLCSR1) when enabled by writing a “1” to RDOE
(Ring Detect Override Enable) in the CLCSR3 register. A valid ring signal can also
produce an interrupt to the CPU when enabled by the RDIE bit in CLCSR1. See
If the ring detect feature is not required it can be disabled by writing to RDPW bit
in the CLCSR2 register. See Section 10.2.1 and Section 10.2.2
10.1.4 Power Management
If the Ring Detect module is used, it should be enabled by setting the RDPW bit
before executing the STOP instruction. When the RT signal is below the threshold,
RD2VT (see Figure 10-5) the oscillator circuit is forced on and the Ring Signal is
validated. If the RT rises above the threshold before the Ring Signal is validated
the oscillator will stop and the MCU will stay in the STOP mode. However, if a valid
ring is detected an interrupt is generated provided the Ring Detect Interrupt
Enable bit (RDIE) is set. The interrupt will wake the MCU from the STOP mode
and the clocks to all enabled modules will start. At this time if the CPU is not
required the WAIT mode can be entered.
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