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參數(shù)資料
| 型號： | MC68HC705CL4FU |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 1.84 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁數(shù)： | 39/101頁 |
| 文件大?。?/td> | 517K |
| 代理商： | MC68HC705CL4FU |
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GENERAL RELEASE SPECIFICATION
February 12, 1997
MOTOROLA
INPUT/OUTPUT PORTS
MC68HC05CL4
7-4
REV 2.0
will be congured into an input pin, and a pull-up resistor is connected to the
pin. When a high to low transition is sensed on the pin, a keyboard interrupt will be
generated, provided the I-bit in the CCR is cleared.
The interrupt signal is latched, and it should be cleared by writing a’1’ to the KBIC
bit (Bit 0 of KBI Register) in the interrupt service routine. This should be cleared
after the Key is debounced, or unwanted keyboard interrupt signal will be gener-
ated.
The Keyboard Interrupt can be congured to be either negative-edge sensitive or
level sensitive. The interrupt vector address is shared with the IRQ and the inter-
rupt service routine is specied by the contents of the memory locations $1FFA
and $1FFB.
7.2.4 KBI Register
KBIC—Keyboard Interrupt Clear
Writing a’1’ to this bit will clear the keyboard interrupt ag latch. This bit should
be cleared in the keyboard interrupt service routine, or the CPU will keep on
serving this interrupt. This bit always reads’0’.
KBIF—Keyboard Interrupt Flag
Key board interrupt ag, this bit is set when a Port A pin PA4-PA7 is pulled low
provided the corresponding KBIE bit is set. When this bit is set an interrupt is
generated. This bit should be cleared in the keyboard interrupt service routine,
or the CPU will keep on serving this interrupt.
KEDGE—Keyboard Interrupt Edge
When this bit is set the key board interrupt is negative edge sensitive and when
this bit is clear the interrupt is level sensitive/edge sensitive.
KBE7-4—Keyboard Interrupt Enables 7-4
Port A I/O lines selected by KBE4-KBE7 will be congured as input lines with
an internal pull-up resistor of 50 K
. Once a High to Low transition is sensed
on any of the input lines of PA4-PA7 selected by the KBI register, provided the
interrupt mask bit of the condition code register is cleared, a keyboard interrupt
is generated. Power-on or external reset will clear these bits.
KBE5
0
7
0000000
6543210
KBE4
KBE6
W
R
KBIR
$0011
reset
KBE7
KBIF
0
KBIC
0
KEDGE
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