參數(shù)資料
型號： MC68HC705CL4FU
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 1.84 MHz, MICROCONTROLLER, PQFP80
封裝： QFP-80
文件頁數(shù)： 35/101頁
文件大?。?/td> 517K
代理商： MC68HC705CL4FU
February 12, 1997
GENERAL RELEASE SPECIFICATION
MC68HC05CL4
INPUT/OUTPUT PORTS
MOTOROLA
REV 2.0
7-1
SECTION 7
INPUT/OUTPUT PORTS
In the Single-Chip Mode there are 30 I/O lines fourteen of which are arranged as
one 8-bit I/O port (Port A) and one 6-bit I/O port (Port B). The remaining sixteen
lines arranged as two 8-bit ports, Port C and Port D. The individual bits in these
ports are programmable as either inputs or outputs under software control by the
data direction registers (DDRs). When Port C and D are congured as outputs,
they are the LCD frontplanes. Also, if enabled by software, PA4 to PA7 will have
additional functions for Keyboard Interrupt.
7.1
PARALLEL PORTS A AND B
Port A, is 8-bit bidirectional port and Port B is a 6-bit bidirectional port. Each Port
pin is controlled by the corresponding bits in a data direction register and a data
register as shown in Figure 7-1. The functions of the I/O pins are summarized in
Figure 7-1. Port I/O Circuitry
I/O
PIN
Read Data
Write Data
Data
Register Bit
Internal HC05
Data Bus
Reset
(RST)
Read/Write DDR
Data Direction
Register Bit
OUTPUT
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