參數(shù)資料
型號: MC68HC16S2CPU25
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, 25.17 MHz, MICROCONTROLLER, PQFP100
封裝: TQFP-100
文件頁數(shù): 32/104頁
文件大?。?/td> 812K
代理商: MC68HC16S2CPU25
MC68HC16S2
MOTOROLA
MC68HC16S2TS/D
33
*ADDR[23:20] follow the state of ADDR19 in the MC68HC16S2. ADDR[23:20] must match ADDR19 in
the base address register for the chip select to be active.
ADDR[23:11] — Base Address Field
This field sets the starting address of a particular address space. The address compare logic uses only
the most significant bits to match an address within a block. The value of the base address must be an
integer multiple of the block size.
NOTE
Because ADDR[23:20] = ADDR19 in the CPU16, maximum block size is 512
Kbytes. For this same reason, addresses from $080000 to $F7FFFF are inacces-
sible. Blocks can be based above this dead zone, but the effect of ADDR19 must
be considered.
BLKSZ[2:0] — Block Size Field
This field determines the size of the block that must be enabled by the chip-select. Table 23 shows bit
encoding for the base address registers block size field.
ADDR[23:20] are at the same logic level as ADDR19 during normal operation.
CSBARBT — Chip-Select Base Address Register Boot ROM
$YFFA48
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADDR
23
ADDR
22
ADDR
21
ADDR
20
ADDR
19
ADDR
18
ADDR
17
ADDR
16
ADDR
15
ADDR
14
ADDR
13
ADDR
12
ADDR
11
BLKSZ[2:0]
RESET:
0
1
CSBAR[0:10] — Chip-Select Base Address Registers
$YFFA4C–$YFFA74
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADDR
23*
ADDR
22*
ADDR
21*
ADDR
20*
ADDR
19
ADDR
18
ADDR
17
ADDR
16
ADDR
15
ADDR
14
ADDR
13
ADDR
12
ADDR
11
BLKSZ[2:0]
RESET:
0
Table 23 Block Size Field Bit Encoding
BLKSZ[2:0]
Block Size
Address Lines Compared
000
2 Kbyte
ADDR[23:11]
001
8 Kbyte
ADDR[23:13]
010
16 Kbyte
ADDR[23:14]
011
64 Kbyte
ADDR[23:16]
100
128 Kbyte
ADDR[23:17]
101
256 Kbyte
ADDR[23:18]
110
512 Kbyte
ADDR[23:19]
111
512 Kbyte
ADDR[23:20]
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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