MC68HC16R1/916R1
USER’S MANUAL
MOTOROLA
vii
(Continued)
Title
Paragraph
Page
TABLE OF CONTENTS
5.7.5.2
5.7.6
5.7.7
5.7.8
5.7.9
5.7.10
5.8
5.8.1
5.8.2
5.8.3
5.8.4
5.8.5
5.9
5.9.1
5.9.1.1
5.9.1.2
5.9.1.3
5.9.1.4
5.9.2
5.9.3
5.9.4
5.10
5.10.1
5.10.2
5.10.3
5.10.4
5.10.5
5.11
Reset States of Pins Assigned to Other MCU Modules ..........5-53
Reset Timing ...................................................................................5-54
Power-On Reset ..............................................................................5-54
Use of the Three-State Control Pin .................................................5-55
Reset Processing Summary ............................................................5-56
Reset Status Register .....................................................................5-56
Interrupts .................................................................................................5-57
Interrupt Exception Processing .......................................................5-57
Interrupt Priority and Recognition ....................................................5-57
Interrupt Acknowledge and Arbitration ............................................5-58
Interrupt Processing Summary ........................................................5-60
Interrupt Acknowledge Bus Cycles ..................................................5-60
Chip-Selects ............................................................................................5-60
Chip-Select Registers ......................................................................5-63
Chip-Select Pin Assignment Registers ...................................5-63
Chip-Select Base Address Registers ......................................5-64
Chip-Select Option Registers ..................................................5-65
PORTC Data Register .............................................................5-66
Chip-Select Operation .....................................................................5-67
Using Chip-Select Signals for Interrupt Acknowledge .....................5-67
Chip-Select Reset Operation ...........................................................5-69
General Purpose Input/Output ................................................................5-70
Ports A and B ..................................................................................5-71
Port E ..............................................................................................5-71
Port F ...............................................................................................5-72
Port G ..............................................................................................5-74
Port H ..............................................................................................5-74
Factory Test ............................................................................................5-75
SECTION 6
STANDBY RAM MODULE
6.1
6.2
6.3
6.4
6.5
6.6
SRAM Register Block ................................................................................6-1
SRAM Array Address Mapping .................................................................6-1
SRAM Array Address Space Type ............................................................6-2
Normal Access ..........................................................................................6-2
Standby and Low-Power Stop Operation ..................................................6-2
Reset .........................................................................................................6-2
SECTION 7
MASKED ROM MODULE