MOTOROLA
viii
MC68HC11P2
TABLE OF CONTENTS
Paragraph
Number
Page
Number
Title
11
CPU CORE AND INSTRUCTION SET
11.1
Registers .............................................................................................................11-1
11.1.1
Accumulators A, B and D...............................................................................11-2
11.1.2
Index register X (IX) .......................................................................................11-2
11.1.3
Index register Y (IY) .......................................................................................11-2
11.1.4
Stack pointer (SP)..........................................................................................11-2
11.1.5
Program counter (PC)....................................................................................11-4
11.1.6
Condition code register (CCR).......................................................................11-4
11.1.6.1
Carry/borrow (C) ......................................................................................11-5
11.1.6.2
Overow (V) .............................................................................................11-5
11.1.6.3
Zero (Z) ....................................................................................................11-5
11.1.6.4
Negative (N) .............................................................................................11-5
11.1.6.5
Interrupt mask (I)......................................................................................11-5
11.1.6.6
Half carry (H)............................................................................................11-6
11.1.6.7
X interrupt mask (X) .................................................................................11-6
11.1.6.8
Stop disable (S)........................................................................................11-6
11.2
Data types ...........................................................................................................11-6
11.3
Opcodes and operands .......................................................................................11-7
11.4
Addressing modes...............................................................................................11-7
11.4.1
Immediate (IMM)............................................................................................11-7
11.4.2
Direct (DIR) ....................................................................................................11-7
11.4.3
Extended (EXT) .............................................................................................11-8
11.4.4
Indexed (IND, X; IND, Y).................................................................................11-8
11.4.5
Inherent (INH) ................................................................................................11-8
11.4.6
Relative (REL)................................................................................................11-8
11.5
Instruction set ......................................................................................................11-8
12
ELECTRICAL SPECIFICATIONS (STANDARD)
12.1
Maximum ratings .................................................................................................12-1
12.2
Thermal characteristics and power considerations .............................................12-2
12.3
Test methods .......................................................................................................12-3
12.4
DC electrical characteristics ................................................................................12-4
12.5
Control timing ......................................................................................................12-5
12.5.1
Peripheral port timing.....................................................................................12-8
12.5.2
Analog-to-digital converter characteristics .....................................................12-9
12.5.3
Serial peripheral interface timing ...................................................................12-10
12.5.4
Nonmultiplexed expansion bus timing............................................................12-13
12.5.5
EEPROM characteristics ...............................................................................12-14
12.5.6
EPROM characteristics .................................................................................12-14