
MOTOROLA
8-8
MC68HC11P2
TIMING SYSTEM
8
OC1 is different from the other output compares in that a successful OC1 compare can affect any
or all ve of the OC pins. The OC1 output action taken when a match is found is controlled by two
8-bit registers with three bits unimplemented: the output compare 1 mask register, OC1M, and the
output compare 1 data register, OC1D. OC1M species which port A outputs are to be used, and
OC1D species what data is placed on these port pins.
8.3.1
TOC1–TOC4 — Timer output compare registers
All output compare registers are 16-bit read-write. Each is initialized to $FFFF at reset. If an output
compare register is not used for an output compare function, it can be used as a storage location.
A write to the high-order byte of an output compare register pair inhibits the output compare
function for one bus cycle. This inhibition prevents inappropriate subsequent comparisons.
Coherency requires a complete 16-bit read or write. However, if coherency is not needed, byte
accesses can be used.
For output compare functions, write a comparison value to output compare registers TOC1–TOC4
and TI4/O5. When TCNT value matches the comparison value, specied pin actions occur.
All TOCx register pairs reset to ones ($FFFF).
8.3.2
CFORC — Timer compare force register
The CFORC register allows forced early compares. FOC[1:5] correspond to the ve output
compares. These bits are set for each output compare that is to be forced. The action taken as a
result of a forced compare is the same as if there were a match between the OCx register and the
free-running counter, except that the corresponding interrupt status ag bits are not set. The
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Timer output compare 1 (TOC1) high
$0016
(bit 15)
(14)
(13)
(12)
(11)
(10)
(9)
(bit 8) 1111 1111
Timer output compare 1 (TOC1) low
$0017
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 1111 1111
Timer output compare 2 (TOC2) high
$0018
(bit 15)
(14)
(13)
(12)
(11)
(10)
(9)
(bit 8) 1111 1111
Timer output compare 2 (TOC2) low
$0019
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 1111 1111
Timer output compare 3 (TOC3) high
$001A
(bit 15)
(14)
(13)
(12)
(11)
(10)
(9)
(bit 8) 1111 1111
Timer output compare 3 (TOC3) low
$001B
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 1111 1111
Timer output compare 4 (TOC4) high
$001C
(bit 15)
(14)
(13)
(12)
(11)
(10)
(9)
(bit 8) 1111 1111
Timer output compare 4 (TOC4) low
$001D
(bit 7)
(6)
(5)
(4)
(3)
(2)
(1)
(bit 0) 1111 1111
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
Timer compare force (CFORC)
$000B
FOC1
FOC2
FOC3
FOC4
FOC5
0
0000 0000