
ELECTRICAL SPECIFICATIONS
13-16
13.8
A/D CONVERTER CHARACTERISTICS
(VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = TL to TH, E = 750kHz to 2.1MHz unless otherwise noted)
Characteristic
Parameter
Min
Absolute
Max
Unit
Resolution
Number of bits resolved by the A/D
10
—
Bits
Nonlinearity
Maximum deviation from the ideal A/D transfer
characteristics
—
TBD
LSB
Zero Error
Difference between the output of an ideal and an
actual A/D for zero input voltage
—
TBD
LSB
Full Scale Error
Difference between the output of an ideal and an
actual A/D for full scale input voltage
—
TBD
LSB
Total Unadjusted Error
Maximum sum of Nonlinearity, zero error and
full scale error
—
TBD
LSB
Quantization Error
Uncertainty due to converter resolution
—
±0.5
LSB
Absolute Accuracy
(See Note 1)
Difference between the actual input voltage and the
full scale weighted equivalent of the binary output
code, all error sources included
—
TBD
LSB
Conversion Range
(See Notes 3 and 4)
Analog input voltage range
Vrl
—Vrh
V
Vrh (See Note 2)
Maximum analog reference voltage
Vrl
—VDD + 0.1
V
Vrl (See Note 2)
Minimum analog reference voltage
VSS - 0.1
—
Vrh
V
Delta Vr (See Note 2)
Minimum difference between Vrh and Vrl
0—
—
V
Conversion Time
Total time to perform a single analog to digital
conversion:
1. E Clock
2. Internal RC Oscillator
—
36
—
tcyc + 24
tcyc
s
Monotonicity
Conversion result never decreases with an increase
in input voltage and has no missing codes
Guaranteed
Zero Input Reading
(See Note 3)
Conversion result when V in = Vrl
$000
—
Hex
Full Scale reading
(See Note 4)
Conversion result when V in = Vrh
—
$3FF
Hex
Sample Acquisition Time
Analog Input Acquisition sampling time:
1. E Clock
2. Internal RC Oscillator
—
13
—
8.7
tcyc
s
Sample Hold Capacitance Input capacitance during sample PE0-PE7
—
35 (Typ)
—
pF
Input Leakage
Input leakage on A/D pins:
PE0-PE7
Vrl, Vrh
—
100
250
nA
A
NOTES:
1.
Source impedances greater then 10k
will adversely affect accuracy, due mainly to input leakage.
2.
Performance verified down to 2.5V Delta V r, but accuracy is tested and guaranteed at Delta V r = 5V ± 10%.
3.
Minimum analog input voltage should not go below V SS - 0.3V.
4.
Maximum analog input voltage should not exceed 1.125V rh.
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Freescale Semiconductor, Inc.
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