參數(shù)資料
型號: MC68HC05SR3
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller Units
中文描述: 高密度互補金屬氧化物半導(dǎo)體(HCMOS)微控制器單元
文件頁數(shù): 55/96頁
文件大小: 3045K
代理商: MC68HC05SR3
MC68HC05SR3
Freescale
8-5
CPU CORE AND INSTRUCTION SET
8
Table 8-1 MUL instruction
Operation
X:A ← X*A
Description
Multiplies the eight bits in the index register by the eight
bits in the accumulator and places the 16-bit result in the
concatenated accumulator and index register.
Condition
codes
H : Cleared
I : Not affected
N : Not affected
Z : Not affected
C : Cleared
Source
MUL
Form
Addressing mode
Cycles
Bytes
Opcode
Inherent
11
1
$42
Table 8-2 Register/memory instructions
Addressing modes
Immediate
Direct
Extended
Indexed
(no
offset)
Indexed
(8-bit
offset)
Indexed
(16-bit
offset)
Function
Mn
emonic
Opco
de
#Bytes
#Cyc
les
Opco
de
#Bytes
#Cyc
les
Opco
de
#Bytes
#Cyc
les
Opco
de
#Bytes
#Cyc
les
Opco
de
#Bytes
#Cyc
les
Opco
de
#Bytes
#Cyc
les
Load A from memory
LDA
A6
2
B6
2
3
C6
3
4
F6
1
3
E6
2
4
D6
3
5
Load X from memory
LDX
AE
2
BE
2
3
CE
3
4
FE
1
3
EE
2
4
DE
3
5
Store A in memory
STA
B7
24
C7
35
F7
14
E7
25
D7
36
Store X in memory
STX
BF
24
CF
35
FF
14
EF
25
DF
36
Add memory to A
ADD
AB
22
BB
23
CB
34
FB
13
EB
24
DB
35
Add memory and carry to A
ADC
A9
22
B9
23
C9
34
F9
13
E9
24
D9
35
Subtract memory
SUBA02
2B02
3
C0
3
4
F0
1
3E02
4
D0
3
5
Subtract memory from A
with borrow
SBCA22
2B22
3
C2
3
4
F2
1
3E22
4
D2
3
5
AND memory with A
AND
A4
22
B4
23
C4
34
F4
13
E4
24
D4
35
OR memory with A
ORA
AA
22
BA
23
CA
34
FA
13
EA
24
DA
35
Exclusive OR memory with A
EOR
A8
22
B8
23
C8
34
F8
13
E8
24
D8
35
Arithmetic compare A
with memory
CMP
A12
2B12
3
C1
3
4
F1
1
3E12
4
D1
3
5
Arithmetic compare X
with memory
CPXA32
2B32
3
C3
3
4
F3
1
3E32
4
D3
3
5
Bit test memory with A
(logical compare)
BIT
A52
2B52
3
C5
3
4
F5
1
3E52
4
D5
3
5
Jump unconditional
JMP
BC
22
CC
33
FC
12
EC
23
DC
34
Jump to subroutine
JSR
BD
25
CD
36
FD
15
ED
26
DD
37
TPG
57
05SR3.Book Page 5 Thursday, August 4, 2005 1:08 PM
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