參數(shù)資料
型號: MC68HC05SR3
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcontroller Units
中文描述: 高密度互補金屬氧化物半導體(HCMOS)微控制器單元
文件頁數(shù): 10/96頁
文件大?。?/td> 3045K
代理商: MC68HC05SR3
Freescale
1-2
MC68HC05SR3
GENERAL DESCRIPTION
1
Internal 100K
pull-up resistors on IRQ and RESET pins
Four channel 8-bit Analog to Digital Converter
Low Voltage Reset
Available in 40-pin PDIP, 42-pin SDIP and 44-pin QFP packages
1.2
Mask Options
The following mask options are available:
RC or Crystal Oscillator (see Section 2.2). The default is crystal option.
Power-On Reset delay — Table 1-1 shows available options. The default value is 4096
cycles.
Power-On Reset Slow mode. If enabled, the device goes into Slow mode directly upon
power-on reset. The bus frequency is 16 times slower than the normal mode. Thus, the
power-on reset delay will also be 16 times longer. The default setting is “Slow mode”
disabled.
Table 1-1 Power-On Reset Delay Mask Option
Power-On Reset Delay
(cycles)
256
512
1024
2048
4096
8192
16384
32768
TPG
16
05SR3.Book Page 2 Thursday, August 4, 2005 1:08 PM
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