參數(shù)資料
型號(hào)： MC68HC05F8B
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, MICROCONTROLLER, PDIP56
封裝： SDIP-56
文件頁數(shù)： 11/126頁
文件大小： 736K
代理商： MC68HC05F8B
MOTOROLA
12-4
MC68HC05F8
OPERATING MODES
12
12.3
Bootstrap Mode
The bootstrap mode is available on the MC68HC705F8 only, and it is a mean of self-programming
its EPROM with minimal circuitry. It is entered on the rising edge of RESET if IRQ1 pin is at 1.8VDD
and TCAP is at logic one. RESET must be held low for 4064 cycles after POR (power-on reset) or
for a time tRL for any other reset. Table 12-3 shows the options that are available once bootstrap
mode is entered. The execution result is indicated by two LEDs. The EPROM programming circuit
for bootstrap mode is shown in Figure 12-5.
12.3.1
EPROM Program Control Register
EPROM programming is controlled by the Program Control Register at location $3F.
Table 12-2 Self-Check Report
PA3
PA2
PA1
PA0
REMARKS
1
Faulty part, port A bad
1
0
Bad I/O
1
0
1
Bad RAM
1
0
Bad ROM
1
0
1
Bad Timer A
1
0
1
0
Bad Timer B
1
0
1
Bad SPI
1
0
Bad MANCD
0
1
Bad Interrupts
Flashing
Good Device
All Others
Bad device, port A, etc.
1=LED off; 0=LED on.
Table 12-3 Bootstrap Mode Options
PB0
REMARKS
0
Program & Verify
1
Verify
Address
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
State
on reset
$3F
0
LAT
EPGM
0000 0000
TPG
106
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