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參數(shù)資料
| 型號： | MC145170-2 |
| 廠商： | Motorola, Inc. |
| 英文描述： | PLL Frequency Synthesizer With Serial Interface(帶串行口的PLL頻率合成器) |
| 中文描述： | 鎖相環(huán)頻率合成器的串行接口（帶串行口的鎖相環(huán)頻率合成器） |
| 文件頁數(shù)： | 14/26頁 |
| 文件大?。?/td> | 373K |
| 代理商： | MC145170-2 |
MC145170–2
DESIGN CONSIDERATIONS
14
MOTOROLA RF/IF DEVICE DATA
CRYSTAL OSCILLATOR CONSIDERATIONS
The following options may be considered to provide a
reference frequency to Motorola’s CMOS frequency
synthesizers.
Use of a Hybrid Crystal Oscillator
Commercially available temperature–compensated
crystal oscillators (TCXOs) or crystal–controlled data clock
oscillators provide very stable reference frequencies. An
oscillator capable of CMOS logic levels at the output may be
direct or dc coupled to OSCin. If the oscillator does not have
CMOS logic levels on the outputs, capacitive or ac coupling
to OSCin may be used (see Figures 8a and 8b).
For additional information about TCXOs, visit
motorola.comon the world wide web.
Use of the On–Chip Oscillator Circuitry
The on–chip amplifier (a digital inverter) along with an
appropriate crystal may be used to provide a reference
source frequency. A fundamental mode crystal, parallel
resonant at the desired operating frequency, should be
connected as shown in Figure 18.
The crystal should be specified for a loading capacitance
(CL) which does not exceed 20 pF when used at the highest
operating frequencies listed in the
Loop Specifications
table. Larger CL values are possible for lower frequencies.
Assuming R1 = 0
, the shunt load capacitance (CL)
presented across the crystal can be estimated to be:
CL
CinCout
Cin
Cout
Ca
Cstray
C1
C1
C2
C2
where
Cin = 5.0 pF (see Figure 19)
Cout = 6.0 pF (see Figure 19)
Ca = 1.0 pF (see Figure 19)
C1 and C2 = external capacitors (see Figure 18)
Cstray = the total equivalent external circuit stray
capacitance appearing across the crystal
terminals
The oscillator can be “trimmed” on–frequency by making a
portion or all of C1 variable. The crystal and associated
components must be located as close as possible to the
OSCin and OSCout pins to minimize distortion, stray
capacitance, stray inductance, and startup stabilization time.
Circuit stray capacitance can also be handled by adding the
appropriate stray value to the values for Cin and Cout. For this
approach, the term Cstray becomes 0 in the above expression
for CL.
A good design practice is to pick a small value for C1, such
as 5 to 10 pF. Next, C2 is calculated. C1 < C2 results in a
more robust circuit for start–up and is more tolerant of crystal
parameter variations.
Power is dissipated in the effective series resistance of the
crystal, Re, in Figure 20. The maximum drive level specified
by the crystal manufacturer represents the maximum stress
that the crystal can withstand without damage or excessive
shift in operating frequency. R1 in Figure 18 limits the drive
level. The use of R1 is not necessary in most cases.
To verify that the maximum dc supply voltage does not
cause the crystal to be overdriven, monitor the output
frequency at the REFout pin (OSCout is not used because
loading impacts the oscillator). The frequency should
increase very slightly as the dc supply voltage is increased.
An overdriven crystal decreases in frequency or becomes
unstable with an increase in supply voltage. The operating
supply voltage must be reduced or R1 must be increased in
value if the overdriven condition exists. The user should note
that the oscillator start–up time is proportional to the value of
R1.
Through the process of supplying crystals for use with
CMOS inverters, many crystal manufacturers have
developed expertise in CMOS oscillator design with crystals.
Discussions with such manufacturers can prove very helpful
(see Table 2).
R1*
C2
C1
Frequency
Synthesizer
OSCout
OSCin
Rf
* May be needed in certain cases. See text.
Figure 18. Pierce Crystal Oscillator Circuit
5.0 to 10 pF
Figure 19. Parasitic Capacitances of the Amplifier
and Cstray
Cin
Cout
Ca
OSCin
OSCout
Cstray
Figure 20. Equivalent Crystal Networks
NOTE:
Values are supplied by crystal manufacturer
(parallel resonant crystal).
2
1
2
1
2
1
RS
LS
CS
Re
Xe
CO
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相關代理商/技術參數(shù) |
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|---|---|
| MC145170D1 | 制造商: 功能描述: 制造商:Motorola Inc 功能描述: 制造商:undefined 功能描述: |
| MC145170D2 | 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MC145170D2R2 | 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MC145170DT2 | 功能描述:鎖相環(huán) - PLL PLL Synthesizer RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| MC145170DT2R2 | 功能描述:IC SERIAL PLL FREQ SYNTH 16TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
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