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參數(shù)資料
| 型號： | MC12430FA |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 時鐘產(chǎn)生/分配 |
| 英文描述： | 800 MHz, OTHER CLOCK GENERATOR, PQFP32 |
| 封裝： | LQFP-32 |
| 文件頁數(shù)： | 9/9頁 |
| 文件大?。?/td> | 165K |
| 代理商： | MC12430FA |
MC12430
FREESCALE SEMICONDUCTOR ADVANCED CLOCK DRIVERS DEVICE DATA
369
due to system power supply noise. The power supply filter and
bypass schemes discussed in this section should be adequate
to eliminate power supply noise related problems in most
designs.
Jitter Performance of the MC12430
The MC12430 exhibits long term and cycle-to-cycle jitter
which rivals that of SAW based oscillators. This jitter
performance comes with the added flexibility one gets with a
synthesizer over a fixed frequency oscillator.
Figure 8. RMS PLL Jitter versus VCO Frequency
Figure 8 illustrates the RMS jitter performance of the
MC12430 across its specified VCO frequency range. Note that
the jitter is a function of both the output frequency as well as the
VCO frequency, however the VCO frequency shows a much
stronger dependence. The data presented has not been
compensated for trigger jitter, this fact provides a measure of
guardband to the reported data.
The typical method of measuring the jitter is to accumulate a
large number of cycles, create a histogram of the edge
placements and record peak-to-peak as well as standard
deviations of the jitter. Care must be taken that the measured
edge is the edge immediately following the trigger edge. The
oscillator cannot collect adjacent pulses, rather it collects
pulses from a very large sample of pulses.
Figure 9. RMS Jitter versus Output Frequency
Figure 9 shows the jitter as a function of the output
frequency. For the MC12430 this information is probably of
more importance. The flat line represents an RMS jitter value
that corresponds to an 8 sigma
±25ps peak-to-peak long term
period jitter. The graph shows that for output frequencies from
87.5 to 400MHz the jitter falls within the
±25ps peak-to-peak
specification. The general trend is that as the output frequency
is decreased the output edge jitter will increase.
performance of the MC12430 when the output is in the divide
by 1 mode. In divide by one mode, the MC12430 output jitter
distribution is bimodal. Since a bimodal distribution cannot be
accurately represented with an rms value, peak-to-peak values
of jitter for the divide by one mode are presented.
Figure 10 shows the peak-to-peak jitter of the 12430 output
in divide by one mode as a function of output frequency. Notice
that as with the other modes the jitter improves with increasing
frequency. The
±65 ps shown in the data sheet table represents
a conservative value of jitter, especially for the higher VCO, and
thus output frequencies.
Figure 10. Peak-to-Peak Jitter versus
Output Frequency
The jitter data presented should provide users with enough
information to determine the effect on their overall timing
budget. The jitter performance meets the needs of most system
designs while adding the flexibility of frequency margining and
field upgrades. These features are not available with a fixed
frequency SAW oscillator.
Output Voltage Swing vs Frequency
In the divide by one mode, the output rise and fall times will
limit the peak to peak output voltage swing. For a 400 MHz
output, the peak to peak swing of the 12430 output will be
approximately 700 mV. This swing will gradually degrade as the
output frequency increases, at 800 MHz the output swing will be
reduced to approximately 500 mV. For a worst case analysis, it
would be safe to assume that the 12430 output will always
generate at least a 500mV output swing. Note that most high
speed ECL receivers require only a few hundred millivolt input
swings for reliable operation. As a result, the output generated
by the 12430 will, under all conditions, be sufficient for clocking
standard ECL devices. Note that if a larger swing is required the
MC12430 could drive a clock fanout buffer like the
MC100EP111.
400
500
600
700
800
25
20
15
10
5
0
RMS
Ji
tter
(p
s)
VCO Frequency (MHz)
N=2
N=4
N=8
25
20
15
10
5
0
RMS
Jitter
(ps
)
6.25ps Reference
Output Frequency (MHz)
25 50 75 100 125 150 175 200 225250275300 325 350 375 400
140
120
100
80
60
40
400
500
600
700
800
Output Frequency (MHz)
Peak-t
o-P
eak
Jit
te
r(p
s)
Spec Limit
N = 1
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