參數(shù)資料
型號： MBM29LV004T
廠商： Fujitsu Limited
英文描述： CMOS 4M (512K ×8) Bit Flash Memory( 單5V 電源電壓512K ×8位閃速存儲器)
中文描述： 的CMOS 4分（為512k × 8）位快閃記憶體（單5V的電源電壓為512k × 8位閃速存儲器）
文件頁數(shù)： 14/47頁
文件大?。?/td> 358K
代理商： MBM29LV004T
14
MBM29LV004T/MBM29LV004B
Notes:
1. Address bits A
15
to A
18
= X = “H” or “L” for all address commands except for Program Address (PA) and
Sector Address (SA).
2. Bus operations are defined in Table 2.
3. RA = Address of the memory location to be read.
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of
the WE pulse.
SA = Address of the sector to be erased. The combination of A
18
, A
17
, A
16
, A
15
, A
14
, and A
13
will uniquely
select any sector.
4. RD =Data read from location RA during read operation.
PD = Data to be programmed at location PA.
5. Both Read/Reset commands are functionally equivalent, resetting the device to the read mode.
Command Definitions
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in the improper sequence will reset the device to read
mode. Table 7 defines the valid register command sequences. Note that the Erase Suspend (B0H) and Erase
Resume (30H) commands are valid only while the Sector Erase operation is in progress. Moreover both Read/
Reset commands are functionally equivalent, resetting the device to the read mode.
Read/Reset Command
The read or reset operation is initiated by writing the Read/Reset command sequence into the command register.
Microprocessor read cycles retrieve array data from the memory. The device remains enabled for reads until the
command register contents are altered.
The device will automatically power-up in the Read/Reset state. In this case, a command sequence is not required
to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures that no
spurious alteration of the memory content occurs during the power transition. Refer to the AC Read
Characteristics and Waveforms for the specific timing parameters.
Table 6 MBM29LV004T/004B Command Definitions
Command
Sequence
Bus
Write
Cycles
Req’d
First Bus
Write Cycle
Second Bus
Write Cycle
Third Bus
Write Cycle
Fourth Bus
Read/Write
Cycle
Fifth Bus
Write Cycle
Sixth Bus
Write Cycle
Addr.
Data
Addr.
Data Addr. Data
Addr.
Data
Addr.
Data Addr. Data
Read/Reset
1
XXXXH F0H
—
—
—
—
—
—
—
—
—
—
Read/Reset
3
5555H
AAH 2AAAH 55H 5555H F0H
RA
RD
—
—
—
—
Autoselect
3
5555H
AAH 2AAAH 55H 5555H 90H
—
—
—
—
—
—
Program
4
5555H
AAH 2AAAH 55H 5555H A0H
PA
PD
—
—
—
—
Chip Erase
6
5555H
AAH 2AAAH 55H 5555H 80H
5555H AAH 2AAAH 55H 5555H 10H
Sector Erase
6
5555H
AAH 2AAAH 55H 5555H 80H
5555H AAH 2AAAH 55H
SA
30H
Sector Erase Suspend Erase can be suspended during sector erase with Addr (“H” or “L”). Data (B0H)
Sector Erase Resume Erase can be resumed after suspend with Addr (“H” or “L”). Data (30H)
相關(guān)PDF資料
PDF描述
MBM29LV004 CMOS 4M SON Packages Flash Memory(CMOS 4M小外形封裝閃速存儲器)
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MBM29LV400 CMOS 4M SON Packages Flash Memory(CMOS 4M小外形封裝閃存)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MBM29LV004T-12PNS-X-EE 制造商:FUJITSU 功能描述:
MBM29LV004T12PNSXR 制造商:FUJITSU 功能描述:
MBM29LV004TC 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:4M (512K X 8) BIT
MBM29LV004TC-12 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:4M (512K X 8) BIT
MBM29LV004TC-12PNS 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:4M (512K X 8) BIT
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