參數資料
型號: MB91F223SPFV-GSE1
元件分類: 微控制器/微處理器
英文描述: RISC MICROCONTROLLER, PQFP144
封裝: 20 X 20 MM, 1.70 MM HEIGHT, 0.50 MM PITCH, PLASTIC, LQFP-144
文件頁數: 24/46頁
文件大小: 2487K
代理商: MB91F223SPFV-GSE1
USB DEVICE CONTROLLER
M66290AGP/FP
MITSUBISHI <DIGITAL ASSP>
37
Name
Bit
Name
-
xxxx
W/R
If the selected endpoint is set to OUT, this becomes to receive data
FIFO register.
If the selected endpoint is set to IN, this becomes to transmit data
FIFO register.
If the selected endpoint is set to 8-bit mode, lower 8 bit [7:0] are valid.
Read operation when the endpoint appointed direction IN, or
write operation when the endpoint appointed direction OUT, is inhibited.
DMA_FIFO data
DMA_FI
FO[15:0]
15 to 0
Bit
Function
W/R
USB
S/W
H/W
Reset
DMA_FIFO[15:0]
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D15
D13
D14
(4-6) DMA_FIFO Data Register (Address : 4Ch)
Reset
Bit
-
1
R
-
000h
R
If this bit is "0", then access is available to DMA_FIFO register.
And if this bit is "0", then the bit of IVAL and DMA_DTLN is valid.
This bit is used as DMA request signal (Dreq).
DMA_FIFO
ready
Dreq
When read this register, receive data length (byte) is appears.
This bit is valid when Dreq bit is "0".
DMA_FIFO
receive data
length
DMA_DT
LN[10:0]
10 to 0
11
Bit
Name
Function
W/R
USB
S/W
H/W
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