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參數(shù)資料
| 型號： | MB91F158PMC1 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RISC MICROCONTROLLER, PQFP120 |
| 封裝： | 14 X 14 MM, 1.70 MM HEIGHT, 0.40 MM PITCH, PLASTIC, LQFP-120 |
| 文件頁數(shù)： | 9/92頁 |
| 文件大?。?/td> | 2193K |
| 代理商： | MB91F158PMC1 |
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MB91F158 Series
DS07-16316-2E
17
Condition Code Register (CCR)
System condition Code Register (SCR)
Interrupt Level Mask register (ILM)
S flag
: Designates the stack pointer for use as R15.
I flag
: Controls enabling and disabling of user interrupt requests.
N flag
: Indicates the sign when arithmetic operation results are considered to be an integer represented
by 2’s complement.
Z flag
: Indicates if arithmetic results were “0”.
V flag
: Considers the operand used for an arithmetic operation to be an integer represented by 2’s com-
plement and indicates if the operation resulted in an overflow.
C flag
: Indicates whether or not an arithmetic operation resulted in a carry or a borrow from the most sig-
nificant bit.
T flag
: Designates whether or not to enable step trace trap.
ILM4 to ILM0
: Holds an interrupt level mask value to be used for level masking.
An interrupt request is accepted only if the corresponding interrupt level among interrupt
requests input to the CPU is higher than the value indicated by the ILM register.
ILM4
ILM3
ILM2
ILM1
ILM0
Interrupt level
High-Low
00
000
0
Higher
01
000
15
11
111
31
Lower
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