
MB91F158 Series
DS07-16316-2E
49
8.
External Interrupt
The external interrupt controller controls external interrupt requests input to INT pins 0 through 15.
The level of requests to be detected can be selected from “H”, “L”, rising edge, and falling edge.
Block Diagram
Register List
9.
Delay Interrupt Module
The delay interrupt is a module that generates task switching interrupts. The use of this module allows the
software to generate/cancel interrupt requests to the CPU.
For the block diagram of the delay interrupt module, see section 7, “Interrupt Controller”.
Register List
16
Interrupt enable register
Interrupt source register
Request level setting register
R-b
u
s
16
32
16
Interrupt
request
Gate
Factor F/F
Edge detection
circuit
16
INT0 to INT15
EIRR0
EIRR1
ENIR0
ENIR1
ELVR0
ELVR1
(R/W)
00000000 B
000000C8H
000000C9H
000000CAH
000000CBH
000000CCH
000000CDH
000000CEH
000000CFH
bit 8
bit 15
Address
bit 0
Initial value
() : Access
R/W : Readable/writable
DICR
(R/W)
bit 7
Address
bit 0
Initial value
-------0 B
00000430H
() : Access
R/W : Readable/writable
: Not in use