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參數(shù)資料
| 型號： | MB91F158PMC1 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RISC MICROCONTROLLER, PQFP120 |
| 封裝： | 14 X 14 MM, 1.70 MM HEIGHT, 0.40 MM PITCH, PLASTIC, LQFP-120 |
| 文件頁數(shù)： | 70/92頁 |
| 文件大小： | 2193K |
| 代理商： | MB91F158PMC1 |
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MB91F158 Series
72
DS07-16316-2E
5.
AC Characteristics
(1) Clock Timing Ratings
(VCC
= 3.2 V to 3.5 V, VSS = AVSS = 0 V, TA = 0 °C to +70 °C)
*1 : The target analog section is the A/D converter.
*2 : The maximum external bus operating frequency allowed is 25 MHz.
*3 : The value when a minimum clock frequency of 10 MHz is input to X0 and half a division of the oscillator circuit
and the 1/8 gear are in use.
Parameter
Sym-
bol
Pin
name
Condition
Value
Unit
Remarks
Min
Max
Clock frequency
(High speed and self
oscillation)
fC
X0, X1
10
16
MHz
Range in which self
oscillation is allowed
Clock frequency
(High speed and PLL in use)
Range in which self
oscillation and the
use of the PLL for
external clock input
are allowed
Clock frequency
(High speed and 1/2 division
input)
10
16
MHz
Range in which
external clocks can
be input
Clock cycle time
tC
X0, X1
62.5
100
ns
Clock pulse width
PWH
X0, X1
25
PWL
15
Input clock rising
tcr
X0, X1
8(tcr + tcf)
Input clock falling
tcf
Internal
operating clock
frequency
CPU
system
fCP
One wait is
set with the
wait
controller.
0.625*3
32
MHz
Bus
system
fCPB
0.625*3
25*2
Peripheral
system
fCPP
0.625*3
32
Analog section
excluded. *1
1
32
Analog section *1
Internal operat-
ing clock cycle
time
CPU
system
tCP
31.25
1600*3
ns
Bus
system
tCPB
40*2
1600*3
Peripheral
system
tCPP
31.25
1600*3
Analog section
excluded. *1
31.25
1000
Analog section *1
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