![](http://datasheet.mmic.net.cn/330000/MB90V520_datasheet_16438189/MB90V520_24.png)
MB90520 Series
24
I
I/O MAP
(Continued)
Address
Abbreviated
register
name
PDR0
PDR1
PDR2
PDR3
PDR4
PDR5
PDR6
PDR7
PDR8
PDR9
PDRA
Register name
Read/
write
Resource name
Initial value
000000
H
000001
H
000002
H
000003
H
000004
H
000005
H
000006
H
000007
H
000008
H
000009
H
00000A
H
Port 0 data register
Port 1 data register
Port 2 data register
Port 3 data register
Port 4 data register
Port 5 data register
Port 6 data register
Port 7 data register
Port 8 data register
Port 9 data register
Port A data register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
Port A
Port 7,
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
XXXXXXXX
B
00000B
H
LCDCMR
Port 7/COM pin selection register
R/W
LCD controller/driver
16-bit I/O timer
(output compare 1
(OCU) section)
XXXX 0 0 0 0
B
00000C
H
OCP4
OCU compare register ch.4
R/W
XXXXXXXX
B
00000D
H
XXXXXXXX
B
00000E
H
00000F
H
000010
H
000011
H
000012
H
000013
H
000014
H
000015
H
000016
H
000017
H
000018
H
000019
H
00001A
H
(Disabled)
EIFR
DDR0
DDR1
DDR2
DDR3
DDR4
DDR5
DDR6
DDR7
DDR8
DDR9
DDRA
Wake-up interrupt flag register
Port 0 direction register
Port 1 direction register
Port 2 direction register
Port 3 direction register
Port 4 direction register
Port 5 direction register
Port 6 direction register
Port 7 direction register
Port 8 direction register
Port 9 direction register
Port A direction register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Wake-up interrupt
XXXXXXX 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
XXX 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
0 0 0 0 0 0 0 0
B
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
Port 7
Port 8
Port 9
Port A
Port 6,
A/Dconverter
16-bit I/O timer
(output compare 1
(OCU) section)
00001B
H
ADER
Analog input enable register
R/W
1 1 1 1 1 1 1 1
B
00001C
H
OCP5
OCU compare register ch.5
R/W
XXXXXXXX
B
00001D
H
XXXXXXXX
B
00001E
H
00001F
H
(Disabled)
EICR
Wake-up interrupt enable register
W
Wake-up interrupt
0 0 0 0 0 0 0 0
B