參數(shù)資料
型號: MB90T673
廠商: Fujitsu Limited
英文描述: Quadruple Bus Buffer Gates With 3- State Outputs 14-CDIP -55 to 125
中文描述: 16位微控制器專有
文件頁數(shù): 91/124頁
文件大?。?/td> 2584K
代理商: MB90T673
91
MB90670/675 Series
(8) Ready Input Timing
(AV
CC
= V
CC
= 2.7 V to 5.5 V, AV
SS
= V
SS
= 0.0 V, T
A
= –40
°
C to +85
°
C)
Note: Use the auto-ready function when the setup time for the rising of the RDY signal is not sufficient.
(9) Hold Timing
(AV
CC
= V
CC
= 2.7 V to 5.5 V, AV
SS
= V
SS
= 0.0 V, T
A
= –40
°
C to +85
°
C)
* :For t
CP
(internal operating clock cycle time), refer to “(3) Clock Timing”.
Note: More than 1 machine cycle is needed before HAK changes after HRQ pin is fetched.
Parameter
Symbol
Pin name
Condition
Value
Unit Remarks
Min.
45
70
0
Max.
RDY setup time
t
RYHS
t
RYHS
t
RYHH
RDY
RDY
RDY
V
CC
= 5.0 V
±
10%
V
CC
= 3.0 V
±
10%
ns
ns
ns
RDY hold time
Parameter
Symbol
Pin name
Condition
Value
Unit Remarks
Min.
Max.
Pins in floating status
HAK
time
HAK
pin valid time
t
XHAL
HAK
30
1 t
CP
*
ns
t
HAHV
HAK
1 t
CP
*
2 t
CP
*
ns
CLK
2.4 V
0.8 V
CC
t
RYHS
ALE
RD/WR
RDY
(WAIT inserted)
RDY
(WAIT inserted)
2.4 V
t
RYHS
0.2 V
CC
0.2 V
CC
0.8 V
CC
t
RYHH
Pins
HAK
High impedance
t
XHAL
2.4 V
0.8 V
2.4 V
0.8 V
t
HAHV
0.8 V
2.4 V
相關(guān)PDF資料
PDF描述
MB90T673PF 16-Bit Buffers/Drivers With 3-State Outputs 48-CFP -55 to 125
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MB90T678PF 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS 48-CFP -55 to 125
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