參數(shù)資料
型號： MB90P634APF
元件分類： 微控制器/微處理器
英文描述： 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100
封裝： PLASTIC, QFP-100
文件頁數(shù)： 7/107頁
文件大小： 1599K
代理商： MB90P634APF
104
MB90630A Series
Table 22
Accumulator Manipulation Instructions (Byte/Word) [6 Instructions]
Table 23
String Instructions [10 Instructions]
m: RW0 value (counter value)
n: Loop count
*1: 5 when RW0 is 0, 4 + 7
× (RW0) for count out, and 7 × n + 5 when match occurs
*2: 5 when RW0 is 0, 4 + 8
× (RW0) in any other case
*3: (b)
× (RW0) + (b) × (RW0) when accessing different areas for the source and destination, calculate (b) separately
for each.
*4: (b)
× n
*5: 2
× (RW0)
*6: (c)
× (RW0) + (c) × (RW0) when accessing different areas for the source and destination, calculate (c) separately
for each.
*7: (c)
× n
*8: 2
× (RW0)
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
Mnemonic
#
~
R
G
BOperation
L
H
A
H
IS
T
N
Z
V
C
RM
W
SWAP
SWAPW/XCHW AL, AH
EXT
EXTW
ZEXT
ZEXTW
1
3
2
1
2
1
0
byte (A) 0 to 7
(A) 8 to 15
word (AH)
(AL)
byte sign extension
word sign extension
byte zero extension
word zero extension
–
X
–
Z
–
*
–
X
–
Z
–
*
R
–
*
–
Mnemonic
#
~
R
G
B
Operation
L
H
A
H
IS
T
N
Z
V
C
RM
W
MOVS/MOVSI
MOVSD
SCEQ/SCEQI
SCEQD
FISL/FILSI
2
*2
*1
6m +6
*5
*3
*4
*3
Byte transfer @AH+
← @AL+, counter
= RW0
Byte transfer @AH–
← @AL–, counter
= RW0
Byte retrieval (@AH+) – AL, counter =
RW0
Byte retrieval (@AH–) – AL, counter =
RW0
Byte filling @AH+
← AL, counter =
RW0
–
*
–
*
–
*
–
*
–
MOVSW/
MOVSWI
MOVSWD
SCWEQ/
SCWEQI
SCWEQD
FILSW/FILSWI
2
*2
*1
6m +6
*8
*6
*7
*6
Word transfer @AH+
←@AL+,counter
= RW0
Word transfer @AH–
← @AL–, counter
= RW0
Word retrieval (@AH+) – AL, counter =
RW0
Word retrieval (@AH–) – AL, counter =
RW0
Word filling @AH+
← AL, counter =
RW0
–
*
–
*
–
*
–
*
–
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