參數(shù)資料
型號: MB90P634APF
元件分類: 微控制器/微處理器
英文描述: 16-BIT, OTPROM, 16 MHz, MICROCONTROLLER, PQFP100
封裝: PLASTIC, QFP-100
文件頁數(shù): 54/107頁
文件大?。?/td> 1599K
代理商: MB90P634APF
50
MB90630A Series
9. DTP/External Interrupts
The DTP (Data Transfer Peripheral) is a peripheral block that interfaces external peripherals to the F2MC-16L
CPU. The DTP receives DMA and interrupt processing requests from external peripherals and passes the
requests to the F2MC-16L CPU to activate the intelligent I/O service or interrupt processing. Two request levels
(“H” and “L”) are provided for the intelligent I/O service. For external interrupt requests, generation of interrupts
on a rising or falling edge as well as on “H” and “L” levels can be selected, giving a total of four types.
(1) Register Configuration
(2) Block Diagram
EN7
EN6
EN5
EN4
EN3
EN2
EN1
EN0
7
6
5
4
321
0
ER7
ER6
ER5
ER4
ER3
ER2
ER1
ER0
15
14
13
12
11
10
9
8
LB3
LA3
LB2
LA2
LB1
LA1
LB0
LA0
7
6
5
4
321
0
LB7
LA7
LB6
LA6
LB5
LA5
LB4
LA4
15
14
13
12
11
10
9
8
Address: 000030H
Address: 000031H
Address: 000032H
Address: 000033H
bit
Interrupt/DTP enable register
(ENIR)
Interrupt/DTP source register
(EIRR)
Request level setting register
(ELVR)
Request level setting register
(ELVR)
4
8
4
Interrupt/DTP enable register
Interrupt/DTP source register
Request level setting register
Gate
Request F/F
Edge detect circuit
Request input
F
2 MC-16
bus
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