參數(shù)資料
型號(hào): MB90F523B
廠商: Fujitsu Limited
英文描述: Octal Transparent D-type Latches With 3-State Outputs 20-CFP -55 to 125
中文描述: 16位微控制器專有
文件頁數(shù): 86/99頁
文件大?。?/td> 978K
代理商: MB90F523B
MB90520A/520B Series
86
(5) UART (SCI) Timings
(AV
CC
=
V
CC
=
5.0 V
±
10
%
, AV
SS
=
V
SS
=
DV
SS
=
0.0 V, Ta
=
40
°
C to
+
85
°
C)
* : See “ (3) Clock Timings” for more information about t
CP
(internal operating clock cycle time) .
Notes :
These are the AC ratings for CLK synchronous mode.
C
L
is the load capacitor connected to the pin for testing.
Parameter
Sym-
bol
Pin Name
Condition
Value
Unit
Re-
marks
Min
Typ
Serial clock cycle time
t
SCYC
SCK0 to SCK2
Internal shift clock
mode, output pin
load is
C
L
=
80 pF
+
1 TTL
8 t
CP*
ns
SCK
SOT delay time
t
SLOV
SCK0 to SCK2
SOT0 to SOT2
80
80
ns
Valid SIN
SCK
t
IVSH
SCK0 to SCK2
SIN0 to SIN2
100
ns
SCK
valid SIN hold time
t
SHIX
SCK0 to SCK2
SIN0 to SIN2
60
ns
Serial clock “H” pulse width
t
SHSL
SCK0 to SCK2
External shift clock
mode, output pin
load is
C
L
=
80 pF
+
1 TTL
4 t
CP*
ns
Serial clock “L” pulse width
t
SLSH
SCK0 to SCK2
4 t
CP*
ns
SCK
SOT delay time
t
SLOV
SCK0 to SCK2
SOT0 to SOT2
150
ns
Valid SIN
SCK
t
IVSH
SCK0 to SCK2
SIN0 to SIN2
60
ns
SCK
valid SIN hold time
t
SHIX
SCK0 to SCK2
SIN0 to SIN2
60
ns
相關(guān)PDF資料
PDF描述
MB90F523BPFF Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-LCCC -55 to 125
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