參數(shù)資料
型號(hào): MB90F523B
廠商: Fujitsu Limited
英文描述: Octal Transparent D-type Latches With 3-State Outputs 20-CFP -55 to 125
中文描述: 16位微控制器專有
文件頁(yè)數(shù): 43/99頁(yè)
文件大小: 978K
代理商: MB90F523B
MB90520A/520B Series
43
PPG10
PPG11
CLK
MD0
R
S
Q
PEN1
PE10
PIE1 PUF1 MD1
MD0
Reserved
PCS2
PCS0 PCM2
PCM1 PCM0 PE11 PE01
PCS1
3
2
Pin
Pin
PPG1
reload
register
PRLH1
("H" level register)
PPG1 temporary
buffer (PRLBH1)
Reload selector
"L" level/"H"
level selector
PPG1 down counter
(PCNT1)
PRLL1
("L" level register)
Select signal
Reload
Underflow
Clear
Count start value
Timebase timer output
(HCLK/512)
Peripheral clock (
φ
/1)
Peripheral clock (
φ
/2)
Peripheral clock (
φ
/4)
Peripheral clock (
φ
/8)
Peripheral clock (
φ
/16)
"H" level data bus
"L" level data bus
PPG1 operation mode control register
(PPGC1)
Interrupt
request output
Operation
mode control signal
PPG1
output latch
Invert
PPG output control circuit
Count
clock
selector
Select signal
PPG01 output control register (PPGOE)
PPG1 underflow
(to PPG0)
PPG0 underflow
(from PPG0)
: Undefined
Reserved : Reserved bit
HCLK
: Oscillation clock frequency
φ
: Machine clock frequency
8/16-bit PPG timer 1
相關(guān)PDF資料
PDF描述
MB90F523BPFF Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-LCCC -55 to 125
MB90F523BPFV Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-CDIP -55 to 125
MB90V520 16-bit Proprietary Microcontroller
MB90522 36-Bit Bus Transceivers With 3-State Outputs 100-LQFP -55 to 125
MB90522PFF Quadruple 2-Input Positive-NAND Gates 14-CDIP -55 to 125
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