參數(shù)資料
型號: MB90F523B
廠商: Fujitsu Limited
英文描述: Octal Transparent D-type Latches With 3-State Outputs 20-CFP -55 to 125
中文描述: 16位微控制器專有
文件頁數(shù): 37/99頁
文件大?。?/td> 978K
代理商: MB90F523B
MB90520A/520B Series
37
Block diagram
The actual interrupt request number for the timebase timer is :
Interrupt request number : #12 (0C
H
)
TBIE TBOF TBR
TBC1 TBC0
×
2
1
×
2
2
×
2
3
×
2
8
×
2
9
×
2
10
×
2
11
×
2
12
×
2
13
×
2
14
×
2
15
×
2
16
×
2
17
×
2
18
OF
Counter clear
circuit
Interval timer
selector
OF
OF
OF
To PPG timer
To watchdog timer
To oscillation
stabilization delay
time selector
in clock controller
Timebase timer/counter
HCLK divided
by 2
Reset
*1
Clear stop mode, etc.
*2
Switch clock mode
*3
TBOF clear
TBOF set
Timebase timer control register
(TBTC)
Timebase timer interrupt signal
OF
HCLK : Oscillation clock frequency
*1
: Power-on reset, release of hardware standby mode, watchdog reset
*2
: Clear stop mode, main clock mode, PLL clock mode, and pseudo-clock mode
*3
: Main
PLL clock, Sub
main clock, Sub
PLL clock
: Overflow
相關(guān)PDF資料
PDF描述
MB90F523BPFF Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-LCCC -55 to 125
MB90F523BPFV Octal Edge-Triggered D-type Flip-Flops With 3-State Outputs 20-CDIP -55 to 125
MB90V520 16-bit Proprietary Microcontroller
MB90522 36-Bit Bus Transceivers With 3-State Outputs 100-LQFP -55 to 125
MB90522PFF Quadruple 2-Input Positive-NAND Gates 14-CDIP -55 to 125
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