參數資料
型號: MB90F337PFM
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 24 MHz, MICROCONTROLLER, PQFP64
封裝: 12 X 12 MM, 1.70 MM HEIGHT, 0.65 MM PITCH, PLASTIC, LQFP-64
文件頁數: 24/92頁
文件大小: 858K
代理商: MB90F337PFM
MB90335 Series
30
3.
Watchdog timer
The watchdog timer is timer counter provided for measure of program runaway. It is a 2-bit counter operating
with an output of the timebase timer or watch timer as the count clock and resets the CPU when the counter is
not cleared for a preset period of time after start.
Interval time of watchdog timer
Notes :
The maximum and minimum time intervals for the watchdog timer depend on the counter clear timing.
The watchdog timer contains a 2-bit counter that counts the carry signals of the time-base timer.
Interval time of watchdog timer is longer than the set time during the following conditions.
- When clearing the timebase timer during operation on oscillation (HCLK)
Event that stop the watchdog timer
Stop due to a power-on reset
Watchdog reset
Clear factor of watchdog timer
External reset input by RST pin
Writing “0” to the software reset bit
Writing “0” to the watchdog control bit (second and subsequent times)
Transition to sleep mode (clearing the watchdog timer to suspend counting)
Transition to time-base timer mode (clearing the watchdog timer to suspend counting)
Transition to stop mode (clearing the watchdog timer to suspend counting)
Register list
HCLK: Oscillation clock (6 MHz)
Min
Max
Clock cycle
Approx. 2.39 ms
Approx. 3.07 ms
214
± 211 / HCLK
Approx. 9.56 ms
Approx. 12.29 ms
216
± 213 / HCLK
Approx. 38.23 ms
Approx. 49.15 ms
218
± 215 / HCLK
Approx. 305.83 ms
Approx. 393.22 ms
221
± 218 / HCLK
Watchdog timer control register (WDTC)
Initial Value
Address : 0000A8H
X-XXX111B
(
)
( R )
( W )
76
5
4
3
2
1
0
( R )
PONR
WRST
ERST
SRST
WTE
WT1
WT0
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