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參數(shù)資料
| 型號： | MB90F244 |
| 廠商： | Fujitsu Limited |
| 英文描述： | Octal Edge-Triggered D-type Flip-Flops With Clock Enable 20-CFP -55 to 125 |
| 中文描述： | 16位微控制器專有 |
| 文件頁數(shù)： | 7/67頁 |
| 文件大?。?/td> | 1403K |
| 代理商： | MB90F244 |
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7
MB90F244
Pin no.
TQFP-80*
23
Pin name
Circuit
type
Function
P45
G
General-purpose I/O port
This function is valid when the corresponding bit of the upper
address control register specification is “port”.
External address bus output pin of the bit 21
This function is valid when the corresponding bit of the upper
address control register specification is “address”.
16-bit input capture #0 data input pin
During 16-bit input capture #0 input operations, these inputs
may be used at any time; therefore, it is necessary to stop
output by other functions on this pin, except when using them
for output deliberately.
16-bit timer #0 data input pin
During 16-bit timer #0 input operations, these inputs may be
used at any time; therefore, it is necessary to stop output by
other functions on this pin, except when using them for output
deliberately.
General-purpose I/O port
This function is valid when the corresponding bit of the upper
address control register specification is “port”.
External address bus output pin of the bit 22
This function is valid when the corresponding bit of the upper
address control register specification is “address”.
16-bit input capture #1 data input pin
During 16-bit input capture #1 input operations, these inputs
may be used at any time; therefore, it is necessary to stop
output by other functions on this pin, except when using them
for output deliberately.
16-bit timer #1 data input pin
During 16-bit timer #1 input operations, these inputs may be
used at any time; therefore, it is necessary to stop output by
other functions on this pin, except when using them for output
deliberately.
General-purpose I/O port
This function is valid when the corresponding bit of the upper
address control register specification is “port”.
External address bus output pin for the bit 23
This function is valid when the corresponding bit of the upper
address control register specification is “address”.
16-bit input capture #2 data input pin
During 16-bit input capture #2 input operations, these inputs
may be used at any time; therefore, it is necessary to stop
output by other functions on this pin, except when using them
for output deliberately.
16-bit timer #2 data input pin
During 16-bit timer #2 input operations, these inputs may be
used at any time; therefore, it is necessary to stop output by
other functions on this pin, except when using them for output
deliberately.
A21
ASR0
TIN0
24
P46
G
A22
ASR1
TIN1
25
P47
G
A23
ASR2
TIN2
*: FPT-80P-M15
(Continued)
相關PDF資料 |
PDF描述 |
|---|---|
| MB90F244PFT-G | Octal Edge-Triggered D-type Flip-Flops With Clock Enable 20-LCCC -55 to 125 |
| MB90F334A | 16-bit Proprietary Microcontroller |
| MB90F334APFF | 16-bit Proprietary Microcontroller |
| MB90F334APMC | 16-bit Proprietary Microcontroller |
| MB90V330A | 16-bit Proprietary Microcontroller |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| MB90F334APMC1-GE1 | 制造商:FUJITSU 功能描述: |
| MB90F334APMC1-G-SPE1 | 制造商:FUJITSU 功能描述: |
| MB90F334APMC-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB90F334APMC-G-SNE1 | 制造商:FUJITSU 功能描述: |
| MB90F334APMC-G-SPE1 | 制造商:FUJITSU 功能描述: |
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