參數(shù)資料
型號: MB90F244
廠商: Fujitsu Limited
英文描述: Octal Edge-Triggered D-type Flip-Flops With Clock Enable 20-CFP -55 to 125
中文描述: 16位微控制器專有
文件頁數(shù): 35/67頁
文件大?。?/td> 1403K
代理商: MB90F244
35
MB90F244
(9) UART Timing
(V
CC
= 3.3 V
±
0.3 V, V
CC
5 = 5.0 V
±
0.5 V, AV
SS
= V
SS
= 0.0 V, T
A
= 0
°
C to +70
°
C)
* :For information on t
CYC
(cycle time), see “(2) Clock Output Timing.”
Notes:
These are the AC characteristics for CLK synchronous mode.
C
L
is the load capacitance added to pins during testing.
Parameter
Symbol
Pin name
Condition
Value
Unit
Remarks
Min.
Max.
Serial clock cycle time t
SCYC
SCK
↓ →
SOD delay
time
Valid SID
SCK
SCK
Valid
SID hold time
For internal shift clock
mode output pin,
C
L
= 80 pF
8 t
CYC
*
ns
t
SLOV
–80
80
ns
t
IVSH
100
ns
t
SHIX
60
ns
Serial clock “H” pulse
width
t
SHSL
For external shift clock
mode output pin,
C
L
= 80 pF
4 t
CYC
*
ns
Serial clock “L” pulse
width
SCK
SOD delay
time delay time
Valid SID
SCK
SCK
↑ →
Valid SID
hold time
t
SLSH
4 t
CYC
*
ns
t
SLOV
150
ns
t
IVSH
60
ns
t
SHIX
60
ns
相關(guān)PDF資料
PDF描述
MB90F244PFT-G Octal Edge-Triggered D-type Flip-Flops With Clock Enable 20-LCCC -55 to 125
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