參數(shù)資料
型號(hào)： MB814100C-60
廠商： Fujitsu Limited
英文描述： CMOS 4 M ×1 BIT Fast Page Mode DRAM(CMOS 4 M ×1 位快速頁(yè)面存取模式動(dòng)態(tài)RAM)
中文描述： 的CMOS 4米× 1位快速頁(yè)面模式的DRAM（的CMOS 4米× 1位快速頁(yè)面存取模式動(dòng)態(tài)內(nèi)存）
文件頁(yè)數(shù)： 9/24頁(yè)
文件大小： 273K
代理商： MB814100C-60
9
MB814100C-60/MB81400C-70
Notes:1.
Referenced to V
SS
.
I
CC
depends on the output load conditions and cycle rates; The specified values are obtained with the
output open.
I
CC
depends on the number of address change as RAS = V
IL
and CAS = V
IH
.
I
CC1
, I
CC3
and I
CC5
are specified at one time of address change during RAS = V
IL
and CAS = V
IH
.
I
CC4
is specified at one time of address change during one Page Cycle.
An Initial pause (RAS = CAS= V
IH
) of 200
μ
s is required after power-up followed by any eight RAS-only
cycles before proper device operation is achieved. In case of using internal refresh counter, a minimum
of eight CAS-before-RAS initialization cycles instead of 8 RAS cycles are required.
AC characteristics assume t
T
= 5 ns.
V
IH
(min) and V
IL
(max) are reference levels for measuring timing of input signals. Also transition times
are measured between V
IH
(min) and V
IL
(max)
Assumes that t
RCD
≤
t
RCD
(max), t
RAD
≤
t
RAD
(max). If t
RCD
is greater than the maximum recommended values
shown in this table, t
RAC
will be increased by the amount that t
RCD
exceeds the value shown. Refer to Fig.
2 and 3.
If t
RCD
≥
t
RCD
(max), t
RAD
≥
t
RAD
(max), and t
ASC
≥
t
AA
– t
CAC
– t
T
, access time is t
CAC
.
If t
RAD
≥
t
RAD
(max) and t
ASC
≤
t
AA
– t
CAC
– t
T
, access time is t
AA
.
Measured with a load equivalent to two TTL loads and 100 pF.
10. t
OFF
is specified that output buffer change to high impedance state.
11. Operation within the t
RCD
(max) limit ensures that t
RAC
(max) can be met. t
RCD
(max) is specified as a
reference point only; if t
RCD
is greater than the specified t
RCD
(max) limit, access time is controlled exclu-
sively by t
CAC
or t
AA
.
12. t
RCD
(min) = t
RAH
(min)+ 2t
T
+ t
ASC
(min).
13. Operation within the t
RAD
(max) limit ensures that t
RAC
(max) can be met. t
RAD
(max) is specified as a
reference point only; if t
RAD
is greater than the specified t
RAD
(max) limit, access time is controlled exclu-
sively by t
CAC
or t
AA
.
14. Either t
RRH
or t
RCH
must be satisfied for a read cycle.
15. t
WCS
, t
CWD
, t
RWD
and t
AWD
are not a restrictive operating parameter. They are included in the data sheet as
an electrical characteristic only. If t
WCS
≥
t
WCS
(min), the cycle is an early write cycle and Dout pin will
maintain high impedance state throughout the entire cycle. If t
CWD
≥
t
CWD
(min), t
RWD
≥
t
RWD
(min) , and
t
AWD
≥
t
AWD
(min), the cycle is a read modify-write cycle and data from the selected cell will appear at the
Dout pin. If neither of the above conditions is satisfied, the cycle is a delayed write cycle and invalid
data will appear the Dout pin , and write operation can be executed by satisfying t
RWL
, t
CWL
, t
CAL
and t
RAL
specifications
16. t
CPA
is access time from the selection of a new column address (that is caused by changing CAS from
“L” to “H”). Therefore, if t
CP
is long, t
CPA
is longer than t
CPA
(max).
17. Assumes that CAS-before-RAS refresh.
18. Assumes that Test mode function.
2.
3.
4.
5.
6.
7.
8.
9.
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