參數(shù)資料
型號: MB814260-70
廠商: Fujitsu Limited
英文描述: CMOS 256K ×16 BIT FAST PAGE MODE DYNAMIC RAM(CMOS 256K ×16 位快速頁面存取模式動態(tài)RAM)
中文描述: 的CMOS 256K × 16位快速頁面模式的動態(tài)隨機存儲器(的CMOS 256K × 16位快速頁面存取模式動態(tài)內(nèi)存)
文件頁數(shù): 1/26頁
文件大?。?/td> 517K
代理商: MB814260-70
1
DS05-10156-4E
FUJITSU SEMICONDUCTOR
DATA SHEET
MEMORY
CMOS 256K
FAST PAGE MODE DYNAMIC RAM
×
16 BIT
MB814260-60/-70
CMOS 262,144
×
16 BIT Fast Page Mode Dynamic RAM
I
DESCRIPTION
The Fujitsu MB814260 is a fully decoded CMOS Dynamic RAM (DRAM) that contains 4,194,304 memory cells
accessible in 16-bit increments. The MB814260 features a “fast page” mode of operation whereby high-speed
access of up to 512
×
16-bits of data can be selected in the same row. The MB814260-60/-70 DRAMs are ideally
suited for memory applications such as embedded control, buffer, portable computers, and video imaging
equipment where very low power dissipation and high bandwidth are basic requirements of the design.
The MB814260 is fabricated using silicon gate CMOS and Fujitsu’s advanced four-layer polysilicon process. This
process, coupled with three-dimensional stacked capacitor memory cells, reduces the possibility of soft errors
and extends the time interval between memory refreshes.
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ABSOLUTE MAXIMUM RATINGS (See NOTE.)
NOTE:
Permanent device damage may occur if the above
operation should be restricted to the conditions as detailed in the operational sections of this data sheet.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings
are exceeded. Functional
Parameter
Symbol
Value
Unit
Voltage at any pin relative to V
SS
V
IN
, V
OUT
–0.5 to +7
V
Voltage of V
CC
supply relative to V
SS
V
CC
–0.5 to +7
V
Power Dissipation
P
D
1.0
W
Short Circuit Output Current
50
mA
°
C
°
C
Storage Temperature
T
STG
–55 to +125
Temperature under Bias
T
BIAS
0 to +70
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be
taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
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