SPI/I2C UART with 128-Word FIFOs in WLP MAX3108 6 Maxim Integrated Stresses beyo" />
參數(shù)資料
型號： MAX3108EWA+T
廠商： Maxim Integrated Products
文件頁數(shù)： 53/56頁
文件大小： 0K
描述： IC UART
產(chǎn)品培訓(xùn)模塊： Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 2,500
系列： *
SPI/I2C UART with 128-Word FIFOs in WLP
MAX3108
6
Maxim Integrated
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
(Voltages referenced to AGND.)
VL, VCC, VEXT, XIN...............................................-0.3V to +4.0V
XOUT........................................................ -0.3V to (VCC + 0.3V)
V18 ...................... -0.3V to the lesser of (VCC + 0.3V) and 2.0V
RST, IRQ, MOSI/A1, CS/A0, SCLK/SCL,
MISO/SDA, LDOEN, SPI/I2C.................... -0.3V to (VL + 0.3V)
TX, RX, RTS, CTS, GPIO_ ....................... -0.3V to (VEXT + 0.3V)
DGND...................................................................-0.3V to +0.3V
Continuous Power Dissipation (TA = +70NC)
WLP (derate 19.2mW/NC above +70NC) ................... 1536mW
Operating Temperature Range.......................... -40NC to +85NC
Maximum Junction Temperature.....................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Soldering Temperature (reflow) ......................................+260NC
WLP
Junction-to-Ambient Thermal Resistance (BJA)...........52NC/W
Junction-to-Case Thermal Resistance (BJC)................11NC/W
DC ELECTRICAL CHARACTERISTICS
(VCC = 1.71V to 3.6V, VL = 1.71V to 3.6V, VEXT = 1.71V to 3.6V, TA = -40NC to +85NC, unless otherwise noted. Typical values are at
VCC = 2.8V, VL = 1.8V, VEXT = 2.5V, TA = +25NC.) (Notes 2, 3)
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
ABSOLUTE MAXIMUM RATINGS
PACKAGE THERMAL CHARACTERISTICS (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Digital Interface Supply Voltage
VL
1.71
3.6
V
Analog Supply Voltage
VCC
Internal PLL disabled and bypassed
1.71
3.6
V
Internal PLL enabled
2.35
3.6
UART Interface Logic Supply
Voltage
VEXT
1.71
3.6
V
Logic Supply Voltage
V18
1.65
1.95
V
CURRENT CONSUMPTION
VCC Supply Current
ICC
1.8MHz crystal oscillator active, PLL
disabled, SPI/I2C interface idle, UART
interfaces idle, LDOEN = high
500
F
A
Baud rate = 1Mbps, 20MHz external clock,
SPI/I2C interface idle, PLL disabled, UART
in loopback mode, LDOEN = low
500
VCC Shutdown Supply Current
ICCSHDN
Shutdown mode, LDOEN = low, RST = low,
all inputs and outputs are idle
35
F
A
VL Shutdown or Sleep Supply
Current
IL
Shutdown or sleep mode, all inputs and
outputs are idle
15
F
A
VEXT Shutdown Supply Current
IEXT
Shutdown mode, RST = low, all inputs and
outputs are idle
10
F
A
V18 Input Power-Supply Current
in Shutdown Mode
I18SHDN
Shutdown mode, LDOEN = low, RST = low,
all inputs and outputs are idle
50
F
A
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